/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SYS_PCI_VAR_H
#define _SYS_PCI_VAR_H
#ifdef __cplusplus
extern "C" {
#endif
/*
* The following typedef is used to represent a
* 1275 "reg" property of a PCI nexus.
*/
typedef struct pci_nexus_regspec {
typedef enum { A, B } pci_side_t;
/*
* the sequence of the chip_type appearance is significant. There are code
* depending on it: CHIP_TYPE(pci_p) < PCI_CHIP_SCHIZO.
*/
typedef enum {
/*
* [msb] [lsb]
* 0x00 <chip_type> <version#> <module-revision#>
*/
/*
* pci common soft state structure:
*
* Each psycho or schizo is represented by a pair of pci nodes in the
* device tree. A single pci common soft state is allocated for each
* pair. The UPA (Safari) bus id of the psycho (schizo) is used for
* the instance number. The attach routine uses the existance of a
* pci common soft state structure to determine if one node from the
* pair has been attached.
*/
struct pci_common {
/* Links to functional blocks potentially shared between pci nodes */
/*
* Performance counters kstat.
*/
};
/*
* pci soft state structure:
*
* Each pci node has a pci soft state structure.
*/
struct pci {
/*
* State flags and mutex:
*/
/*
* Links to other state structures:
*/
/*
* other state info:
*/
/*
* pci device node properties:
*/
int pci_ranges_length;
/*
* register mapping:
*/
/* Interrupt support */
int intr_map_size;
/* performance counters */
/* Hotplug information */
/* Fault Management support */
int pci_fm_cap;
};
/*
* PSYCHO and PBM soft state macros:
*/
#define get_pci_soft_state(i) \
#define alloc_pci_soft_state(i) \
#define free_pci_soft_state(i) \
#define get_pci_common_soft_state(i) \
#define alloc_pci_common_soft_state(i) \
#define free_pci_common_soft_state(i) \
extern void *per_pci_state; /* per-pbm soft state pointer */
extern void *per_pci_common_state; /* per-psycho soft state pointer */
extern kmutex_t dvma_active_list_mutex;
/*
* function prototypes for bus ops routines:
*/
extern int
extern int
extern int
extern int
extern int
extern int
extern int
extern int
extern int
#ifdef __cplusplus
}
#endif
#endif /* _SYS_PCI_VAR_H */