/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2005 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SYS_SYSCTRL_H
#define _SYS_SYSCTRL_H
#pragma ident "%Z%%M% %I% %E% SMI"
#ifdef __cplusplus
extern "C" {
#endif
#ifndef TRUE
#endif
#ifndef FALSE
#define FALSE (0)
#endif
/*
* Debugging macros
*
* The DPRINTF macro can be used by setting the sysc_debug_print_level to the
* appropriate debugging level. The debug levels are defined in each source
* file where this header file is included. The scoping of sysc_debug_info,
* and sysc_debug_print_level is to the file which included the header file.
* If multiple levels need to be output, the values can be 'ored'
* together into sysc_debug_print_level. If sysc_debug_print_line's bit 1 is
* set, the line number of the debugging statement is printed out. If it has
* bit 2 set, the macro will drop into either the debugger or the OBP PROM.
*/
#ifdef DEBUG
extern void debug_enter(char *);
extern int sysc_debug_info;
extern int sysc_debug_print_level;
if (sysc_debug_print_level & (print_flag)) { \
if (sysc_debug_info & ENTER_MON) \
debug_enter(""); \
}
#else
#endif /* DEBUG */
/*
* OBP supplies us with 3 register sets for the clock-board node. The code for
* the syctrl driver relies on these register sets being presented by the
* PROM in the order specified below. If this changes, the following comments
* must be revised and the code in sysctrl_attach() must be changed to reflect
* these revisions.
*
* They are:
* 0 Clock frequency registers
* 1 Misc registers
* 2 Clock version register
*/
/*
* The offsets are defined as offsets in bytes from the base of the OBP
* register to which the register belongs to.
*/
/* Register set 0 */
/* Important bits for Clock Frequency register 2 */
/* Register set 1 */
/* Register set 2 (not present on old vintage clock boards) */
/* Important bits for the board version register */
/* Bit field defines for System Control register */
/* Bit field defines for System Status1 register */
/* Macros to determine system type from System Status1 register */
/* Bit field defines for Clock Version Register */
/* Macros to determine frequency capability from clock version register */
/* Macros to determine system type based on number of physical slots */
#define ISTESTBED(n) ((n) == 0)
/* Bit field defines for System Status2 register */
/* Bit field defines for Power Supply Presence register */
/* Bit field defines for Precharge and Peripheral Power Status register */
#ifndef _ASM
/*
* The Power Supply shadow kstat is too large to fit in a kstat_named
* struct, so it has been changed to be a raw kstat.
*/
/* States of a power supply DC voltage. */
/*
* several power supplies are managed -- 8 core power supplies,
* up to two pps, a couple of clock board powers and a register worth
* of precharges.
*/
/* core PS 0 thru 7 are index 0 thru 7 */
/* fan timeout structures */
/*
* States of the secure key switch position.
*/
/* Redundant power states */
/*
* minor device mask
* B - bottom 4 bits (16 slots) are for the slot/receptacle id
* I - next 4 bits are for the instance number
* X - rest are not used
*
* Upper Lower
* XXXXX...............IIIIBBBB
*
* Example:
* device at instance 0 and slot 8, minor device number 0x8 = decimal 8
* device at instance 1 and slot 10, minor device number 0x1A = decimal 26
*/
/* Macro definitions */
#define GETSOFTC(i) \
/*
* Definition of sysctrl ioctls.
*/
#if defined(_KERNEL)
/*
* how many ticks to wait to register the state change
* NOTE: ticks are measured in PS_FAIL_TIMEOUT_USEC clicks
*/
/* Note: this timeout needs to be longer than FAN_OK_TIMEOUT_USEC */
/* NOTE: these ticks are measured in PPS_FAN_TIMEOUT_USEC clicks */
/*
* how many spurious interrupts to take during a SPUR_LONG_TIMEOUT_USEC
* before complaining
*/
/*
* Global driver structure which defines the presence and status of
* all board power supplies.
*/
struct ps_state {
};
/*
* for sysctrl_thread_wakeup()
*/
/*
* Structures used in the driver to manage the hardware
* XXX will need to add a nodeid
*/
struct sysctrl_soft_state {
/* This mutex protects the following data */
/* NOTE: *csr should only be accessed from interrupt level */
/* This mutex protects the following data */
/* This mutex protects the following data */
/* This mutex protects the following data */
/* various elements protected by their inherent access patterns */
};
/*
* Kstat structures used to contain data which is requested by user
* programs.
*/
struct sysctrl_kstat {
};
/*
* Function prototype
*/
int sysc_policy_disconnect(struct sysctrl_soft_state *,
sysc_cfga_pkt_t *, sysc_cfga_stat_t *);
int sysc_policy_connect(struct sysctrl_soft_state *,
sysc_cfga_pkt_t *, sysc_cfga_stat_t *);
int sysc_policy_unconfigure(struct sysctrl_soft_state *,
sysc_cfga_pkt_t *, sysc_cfga_stat_t *);
int sysc_policy_configure(struct sysctrl_soft_state *,
sysc_cfga_pkt_t *, sysc_cfga_stat_t *);
extern void sysctrl_suspend_prepare(void);
extern int sysctrl_suspend(sysc_cfga_pkt_t *);
extern void sysctrl_resume(sysc_cfga_pkt_t *);
#endif /* _KERNEL */
#endif /* _ASM */
#ifdef __cplusplus
}
#endif
#endif /* _SYS_SYSCTRL_H */