/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
*/
#include <sys/machsystm.h>
#include <sys/archsystm.h>
#include <sys/bootconf.h>
#include <sys/memlist_plat.h>
#include <sys/memlist_impl.h>
#include <sys/prom_plat.h>
#include <sys/prom_isa.h>
#include <sys/autoconf.h>
#include <sys/iommutsb.h>
#include <vm/seg_kmem.h>
#include <vm/hat_sfmmu.h>
#include <sys/platform_module.h>
#include <sys/cpu_sgnblk_defs.h>
#include <sys/fpras_impl.h>
#include <sys/prom_debug.h>
#include <sys/traptrace.h>
#include <sys/mem_cage.h>
/*
* fpRAS implementation structures.
*/
/*
* Increase unix symbol table size as a work around for 6828121
*/
/*
* Halt idling cpus optimization
*
* This optimation is only enabled in platforms that have
* the CPU halt support. The cpu_halt_cpu() support is provided
* in the cpu module and it is referenced here with a pragma weak.
* The presence of this routine automatically enable the halt idling
* cpus functionality if the global switch enable_halt_idle_cpus
* is set (default is set).
*
*/
#pragma weak cpu_halt_cpu
extern void cpu_halt_cpu();
/*
* Defines for the idle_state_transition DTrace probe
*
* The probe fires when the CPU undergoes an idle state change (e.g. halting)
* The agument passed is the state to which the CPU is transitioning.
*
* The states are defined here.
*/
#define IDLE_STATE_NORMAL 0
void
setup_trap_table(void)
{
}
void
{
if (fpras_implemented && !fpras_disable) {
int i;
/*
* Note that we size off of NCPU and setup for
* all those possibilities regardless of whether
* the cpu id is present or not. We do this so that
* we don't have any construction or destruction
* activity to perform at DR time, and it's not
* costly in memory. We require block alignment.
*/
} else {
chkfngrpsallocsz += 64;
KM_SLEEP);
fpras_chkfngrps = (struct fpras_chkfngrp *)
}
/*
* Copy our check function into place for each copy operation
* and each cpu id.
*/
fcgp = &fpras_chkfngrps[0];
for (i = 0; i < FPRAS_NCOPYOPS; ++i)
sizeof (struct fpras_chkfn));
for (i = 1; i < NCPU; ++i)
*(&fpras_chkfngrps[i]) = *fcgp;
/*
* At definition fpras_frequency is set to -1, and it will
* strictly supported, but not preventable). The following
* both sets the default and sanity checks anything from
*/
if (fpras_frequency < 0)
/*
* Now calculate fpras_interval. When fpras_interval
* becomes non-negative fpras checks will commence
* (copies before this point in boot will bypass fpras).
* Our stores of instructions must be visible; no need
* to flush as they're never been executed before.
*/
fpras_interval = (fpras_frequency == 0) ?
0 : sys_tick_freq / fpras_frequency;
}
}
void
mach_hw_copy_limit(void)
{
if (!fpu_exists) {
use_hw_bcopy = 0;
hw_copy_limit_1 = 0;
hw_copy_limit_2 = 0;
hw_copy_limit_4 = 0;
hw_copy_limit_8 = 0;
use_hw_bzero = 0;
}
}
void
{
/*
* Load tod driver module for the tod part found on this system.
* tends to keep time more accurately.
*/
halt("Can't load tod module");
}
void
mach_memscrub(void)
{
/*
* Startup memory scrubber, if not running fpu emulation code.
*/
#ifndef _HW_MEMSCRUB_SUPPORT
if (fpu_exists) {
if (memscrub_init()) {
"Memory scrubber failed to initialize");
}
}
#endif /* _HW_MEMSCRUB_SUPPORT */
}
/*
* Halt the present CPU until awoken via an interrupt.
* This routine should only be invoked if cpu_halt_cpu()
* exists and is supported, see mach_cpu_halt_idle()
*/
void
cpu_halt(void)
{
uint_t s;
/*
* If this CPU is online then we should notate our halting
* by adding ourselves to the partition's halted CPU
* work becomes available.
*/
hset_update = 0;
/*
* Add ourselves to the partition's halted CPUs bitset
* and set our HALTED flag, if necessary.
*
* When a thread becomes runnable, it is placed on the queue
* and then the halted cpu bitset is checked to determine who
* (if anyone) should be awoken. We therefore need to first
* add ourselves to the halted bitset, and then check if there
* is any work available. The order is important to prevent a race
* that can lead to work languishing on a run queue somewhere while
* this CPU remains halted.
*
* Either the producing CPU will see we're halted and will awaken us,
* or this CPU will see the work available in disp_anywork()
*/
if (hset_update) {
}
/*
* Check to make sure there's really nothing to do.
* Work destined for this CPU may become available after
* this check. We'll be notified through the clearing of our
* bit in the halted CPU bitset, and a poke.
*/
if (disp_anywork()) {
if (hset_update) {
}
return;
}
/*
* We're on our way to being halted. Wait until something becomes
* runnable locally or we are awaken (i.e. removed from the halt set).
* Note that the call to hv_cpu_yield() can return even if we have
* nothing to do.
*
* Disable interrupts now, so that we'll awaken immediately
* after halting if someone tries to poke us between now and
* the time we actually halt.
*
* We check for the presence of our bit after disabling interrupts.
* If it's cleared, we'll return. If the bit is cleared after
* we check then the poke will pop us out of the halted state.
* Also, if the offlined CPU has been brought back on-line, then
* we return as well.
*
* The ordering of the poke and the clearing of the bit by cpu_wakeup
* is important.
* cpu_wakeup() must clear, then poke.
* cpu_halt() must disable interrupts, then check for the bit.
*
* The check for anything locally runnable is here for performance
* and isn't needed for correctness. disp_nrunnable ought to be
* in our cache still, so it's inexpensive to check, and if there
* is anything runnable we won't have to wait for the poke.
*
* Any interrupt will awaken the cpu from halt. Looping here
* will filter spurious interrupts that wake us up, but don't
* represent a need for us to head back out to idle(). This
* will enable the idle loop to be more efficient and sleep in
* the processor pipeline for a larger percent of the time,
* which returns useful cycles to the peer hardware strand
* that shares the pipeline.
*/
s = disable_vec_intr();
while (*p == 0 &&
(void) cpu_halt_cpu();
enable_vec_intr(s);
s = disable_vec_intr();
}
/*
* We're no longer halted
*/
enable_vec_intr(s);
if (hset_update) {
}
}
/*
* If "cpu" is halted, then wake it up clearing its halted bit in advance.
* Otherwise, see if other CPUs in the cpu partition are halted and need to
* be woken up so that they can steal the thread we placed on this CPU.
* This function is only used on MP systems.
* This function should only be invoked if cpu_halt_cpu()
* exists and is supported, see mach_cpu_halt_idle()
*/
static void
{
/*
* Clear the halted bit for that CPU since it will be
* poked in a moment.
*/
/*
* We may find the current CPU present in the halted cpu bitset
* if we're in the context of an interrupt that occurred
* before we had a chance to clear our bit in cpu_halt().
* Poking ourself is obviously unnecessary, since if
* we're here, we're not halted.
*/
return;
} else {
/*
* This cpu isn't halted, but it's idle or undergoing a
* context switch. No need to awaken anyone else.
*/
return;
}
/*
* No need to wake up other CPUs if this is for a bound thread.
*/
if (bound)
return;
/*
* The CPU specified for wakeup isn't currently halted, so check
* to see if there are any other halted CPUs in the partition,
* and if there are then awaken one.
*
* If possible, try to select a CPU close to the target, since this
* will likely trigger a migration.
*/
do {
return;
}
void
mach_cpu_halt_idle(void)
{
if (enable_halt_idle_cpus) {
if (&cpu_halt_cpu) {
}
}
}
/*ARGSUSED*/
int
{
/* Interrupt mondo queues not applicable to sun4u */
return (0);
}
/*ARGSUSED*/
void
{
/* Interrupt mondo queues not applicable to sun4u */
}
/*ARGSUSED*/
void
{
}
/*ARGSUSED*/
void
{
/* Setup hypervisor traptrace buffer, not applicable to sun4u */
}
/*ARGSUSED*/
void
{
/* enable/ disable hypervisor traptracing, not applicable to sun4u */
}
/*ARGSUSED*/
void
{
/* cleanup hypervisor traptrace buffer, not applicable to sun4u */
}
void
{
/*
* Only for sun4v.
* Initialize Machine description framework during startup.
*/
}
void
{
/*
* Only for sun4v.
* Clean up Machine Description framework during startup.
*/
}
void
mach_descrip_init(void)
{
/*
* Only for sun4v.
* Initialize Machine description framework.
*/
}
void
hsvc_setup(void)
{
/* Setup hypervisor services, not applicable to sun4u */
}
void
load_mach_drivers(void)
{
/* Currently no machine class (sun4u) specific drivers to load */
}
/*
* Return true if the machine we're running on is a Positron.
* (Positron is an unsupported developers platform.)
*/
int
iam_positron(void)
{
return (0);
return (1);
return (0);
}
/*
* Find a physically contiguous area of twice the largest ecache size
* to be used while doing displacement flush of ecaches.
*/
ecache_flush_address(void)
{
return (ret_val);
}
return ((uint64_t)-1);
}
/*
* Called with the memlist lock held to say that phys_install has
* changed.
*/
void
phys_install_has_changed(void)
{
/*
* Get the new address into a temporary just in case panicking
* involves use of ecache_flushaddr.
*/
"ecache_flush_address(): failed, ecache_size=%x",
/*NOTREACHED*/
}
}