/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2010 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#include <sys/todm5819.h>
#include <sys/machsystm.h>
#include <sys/lom_priv.h>
#define WDOG_OFF 0
static timestruc_t todbl_get(void);
static void todbl_set(timestruc_t);
static uint_t todbl_clear_watchdog_timer(void);
static void todbl_set_power_alarm(timestruc_t);
static void todbl_clear_power_alarm(void);
static uint64_t todbl_get_cpufrequency(void);
static void write_rtc_time(struct rtc_t *);
/*
* External variables
*/
extern int watchdog_enable;
extern int watchdog_available;
extern int watchdog_activated;
extern uint_t watchdog_timeout_seconds;
extern int boothowto;
extern void (*bsc_drv_func_ptr)(struct bscv_idi_info *);
/*
* Global variables
*/
int m5819_debug_flags;
&mod_miscops, "todblade module",
};
};
int
_init(void)
{
watchdog_available = 0;
"detected: hardware watchdog disabled");
}
}
return (mod_install(&modlinkage));
}
int
_fini(void)
{
return (EBUSY);
} else {
return (mod_remove(&modlinkage));
}
}
/*
* The loadable-module _info(9E) entry point
*/
int
{
}
/*
* Read the current time from the clock chip and convert to UNIX form.
* Assumes that the year in the clock chip is valid.
* Must be called with tod_lock held.
*/
static timestruc_t
todbl_get(void)
{
int i;
/*
* We must check that the value of watchdog enable hasnt changed
* as its a user knob for turning it on and off
*/
if (watchdog_available) {
if (watchdog_activated && !watchdog_enable) {
(void) configure_wdog(WDOG_OFF);
} else if (!watchdog_activated && watchdog_enable) {
(void) configure_wdog(WDOG_ON);
} else if (watchdog_activated &&
/*
* PAT THE WATCHDOG!!
* We dont want to accelerate the pat frequency
* when userland calls to the TOD_GET_DATE ioctl
* pass through here.
*/
if (bsc_drv_func_ptr != NULL) {
(*bsc_drv_func_ptr)(&bscv_info);
}
}
}
/*
* Read from the tod, and if it isnt accessible wait
* before retrying.
*/
for (i = 0; i < TODM5819_UIP_RETRY_THRESH; i++) {
break;
}
if (i == TODM5819_UIP_RETRY_THRESH) {
/*
* We couldn't read from the TOD.
*/
return (hrestime);
}
DPRINTF("todbl_get: century=%d year=%d dom=%d hrs=%d\n",
/* read was successful so ensure failure flag is clear */
return (ts);
}
static todinfo_t
{
/*
* tod_year is base 1900 so this code needs to adjust the true
* year retrieved from the rtc's century and year fields.
*/
return (tod);
}
static uint_t
{
int s;
s = splhi();
/*
* If UIP bit is not set we have at least 274us
* to read the values.
*/
rtc_readable = 1;
/* Clear wakeup data */
}
splx(s);
return (rtc_readable);
}
/*
* Write the specified time into the clock chip.
* Must be called with tod_lock held.
*/
static void
{
int year;
/* tod_year is base 1900 so this code needs to adjust */
DPRINTF("todbl_set: century=%d year=%d dom=%d hrs=%d\n",
/*
* Because of a generic solaris problem where calls to stime()
* starve calls to tod_get(), we need to check to see when the
* watchdog was last patted and pat it if necessary.
*/
if (watchdog_activated &&
/*
* Pat the watchdog!
*/
if (bsc_drv_func_ptr != NULL) {
(*bsc_drv_func_ptr)(&bscv_info);
}
}
}
static void
{
int i;
/*
* Freeze
*/
/*
* If an update is in progress wait for the UIP flag to clear.
* If we write whilst UIP is still set there is a slight but real
* possibility of corrupting the RTC date and time registers.
*
* The expected wait is one internal cycle of the chip. We could
* simply spin but this may hang a CPU if we were to have a broken
* RTC chip where UIP is stuck, so we use a retry loop instead.
* No critical section is needed here as the UIP flag will not be
* re-asserted until we clear RTC_SET.
*/
for (i = 0; i < TODM5819_UIP_RETRY_THRESH; i++) {
break;
}
}
if (i < TODM5819_UIP_RETRY_THRESH) {
} else {
}
/*
* Unfreeze
*/
}
/*
* The TOD alarm functionality is not supported on our platform
* as the interrupt is not wired, so do nothing.
*/
/*ARGSUSED*/
static void
{
}
/*
* clear alarm interrupt
*/
static void
todbl_clear_power_alarm(void)
{
}
/*
* Determine the cpu frequency by watching the TOD chip rollover twice.
* Cpu clock rate is determined by computing the ticks added (in tick register)
* during one second interval on TOD.
*/
todbl_get_cpufrequency(void)
{
return (find_cpufrequency(v_rtc_data_reg));
}
static uint_t
{
/*
* We get started during kernel intilaisation only
* if watchdog_enable is set.
*/
if (watchdog_available && (!watchdog_activated ||
if (configure_wdog(WDOG_ON))
return (watchdog_timeout_seconds);
}
return (0);
}
static uint_t
{
/*
* The core kernel will call us here to disable the wdog when:
* 1. we're panicing
* 2. we're entering debug
* 3. we're rebooting
*/
if (watchdog_available && watchdog_activated) {
watchdog_enable = 0;
if (!configure_wdog(WDOG_OFF))
return (0);
}
return (watchdog_timeout_seconds);
}
static uint_t
{
if (bsc_drv_func_ptr != NULL) {
(*bsc_drv_func_ptr)(&bscv_info);
return (1);
}
}
return (0);
}