/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2010 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* PCI nexus driver interface
*/
#include <sys/ddi_impldefs.h>
#include <sys/ddi_subrdefs.h>
/*LINTLIBRARY*/
/*
* function prototype for hotplug routine:
*/
static void
pci_init_hotplug(struct pci *);
/*
* function prototypes for dev ops routines:
*/
void *result);
/*
* bus ops and dev ops structures:
*/
0,
0,
0,
ndi_busop_get_eventcookie, /* (*bus_get_eventcookie)(); */
ndi_busop_add_eventcall, /* (*bus_add_eventcall)(); */
ndi_busop_remove_eventcall, /* (*bus_remove_eventcall)(); */
ndi_post_event, /* (*bus_post_event)(); */
NULL, /* (*bus_intr_ctl)(); */
NULL, /* (*bus_config)(); */
NULL, /* (*bus_unconfig)(); */
pci_fm_init_child, /* (*bus_fm_init)(); */
NULL, /* (*bus_fm_fini)(); */
pci_bus_enter, /* (*bus_fm_access_enter)(); */
pci_bus_exit, /* (*bus_fm_access_fini)(); */
NULL, /* (*bus_power)(); */
pci_intr_ops /* (*bus_intr_op)(); */
};
extern struct cb_ops pci_cb_ops;
0,
0,
0,
ddi_quiesce_not_supported, /* devo_quiesce */
};
/*
* module definitions:
*/
extern struct mod_ops mod_driverops;
&mod_driverops, /* Type of module - driver */
"Sun4u Host to PCI nexus driver", /* Name of module. */
&pci_ops, /* driver ops */
};
};
/*
* driver global data:
*/
extern errorq_t *pci_target_queue;
int
_init(void)
{
int e;
/*
* Initialize per-pci bus soft state pointer.
*/
if (e != 0)
return (e);
/*
* Initialize per-psycho soft state pointer.
*/
sizeof (pci_common_t), 1);
if (e != 0) {
return (e);
}
/*
* Initialize global mutexes.
*/
/*
* Create the performance kstats.
*/
/*
* Install the module.
*/
e = mod_install(&modlinkage);
if (e != 0) {
}
return (e);
}
int
_fini(void)
{
int e;
/*
* Remove the module.
*/
e = mod_remove(&modlinkage);
if (e != 0)
return (e);
/*
* Destroy pci_ecc_queue, and set it to NULL.
*/
if (pci_ecc_queue)
/*
* Destroy pci_target_queue, and set it to NULL.
*/
if (pci_target_queue)
/*
* Destroy the performance kstats.
*/
/*
* Free the per-pci and per-psycho soft state info and destroy
* mutex for per-psycho soft state.
*/
return (e);
}
int
{
}
/*ARGSUSED*/
static int
{
/* allow hotplug to deal with ones it manages */
/* non-hotplug or not attached */
switch (infocmd) {
case DDI_INFO_DEVT2INSTANCE:
return (DDI_SUCCESS);
case DDI_INFO_DEVT2DEVINFO:
return (DDI_FAILURE);
return (DDI_SUCCESS);
default:
return (DDI_FAILURE);
}
}
/* device driver entry points */
/*
* attach entry point:
*/
static int
{
switch (cmd) {
case DDI_ATTACH:
/*
* Allocate and get the per-pci soft state structure.
*/
goto err_bad_pci_softstate;
}
/*
* Get key properties of the pci bridge node and
* determine it's type (psycho, schizo, etc ...).
*/
goto err_bad_pci_prop;
/*
* Map in the registers.
*/
goto err_bad_reg_prop;
goto err_bad_objs;
/*
* If this PCI leaf has hotplug and this platform
* loads hotplug modules then initialize the
* hotplug framework.
*/
/*
* Create the "devctl" node for hotplug support.
* For non-hotplug bus, we still need ":devctl" to
* support DEVCTL_DEVICE_* and DEVCTL_BUS_* ioctls.
*/
DDI_NT_NEXUS, 0) != DDI_SUCCESS)
goto err_bad_devctl_node;
}
/*
* Create pcitool nodes for register access and interrupt
* routing.
*/
goto err_bad_pcitool_nodes;
}
break;
else
(void) pcihp_uninit(dip);
return (DDI_FAILURE);
case DDI_RESUME:
/*
* Make sure the Psycho control registers and IOMMU
* are configured properly.
*/
/*
* Make sure this instance has been suspended.
*/
return (DDI_FAILURE);
}
break;
default:
return (DDI_FAILURE);
}
return (DDI_SUCCESS);
}
/*
* detach entry point:
*/
static int
{
/*
* Make sure we are currently attached
*/
return (DDI_FAILURE);
}
switch (cmd) {
case DDI_DETACH:
return (DDI_FAILURE);
}
/*
* Free the pci soft state structure and the rest of the
* resources it's using.
*/
/* Free the interrupt-priorities prop if we created it. */
{
int len;
"interrupt-priorities");
}
return (DDI_SUCCESS);
case DDI_SUSPEND:
return (DDI_SUCCESS);
default:
return (DDI_FAILURE);
}
}
/* bus driver entry points */
/*
* bus map entry point:
*
* if map request is for an rnumber
* get the corresponding regspec from device node
* build a new regspec in our parent's format
* build a new map_req with the new regspec
* call up the tree to complete the mapping
*/
int
{
return (DDI_ME_UNIMPLEMENTED);
case DDI_MT_REGSPEC:
break;
case DDI_MT_RNUMBER:
return (DDI_ME_RNUMBER_RANGE);
return (DDI_ME_RNUMBER_RANGE);
}
break;
default:
return (DDI_ME_INVAL);
}
/* use "assigned-addresses" to relocate regspec within pci space */
goto done;
if (len) /* adjust regspec according to mapping request */
/* use "ranges" to translate relocated pci regspec into parent space */
goto done;
if (rval == DDI_SUCCESS) {
/*
* Set-up access functions for FM access error capable drivers.
* The axq workaround prevents fault management support
*/
}
done:
return (rval);
}
/*
* bus dma map entry point
* return value:
* DDI_DMA_PARTIAL_MAP 1
* DDI_DMA_MAPOK 0
* DDI_DMA_MAPPED 0
* DDI_DMA_NORESOURCES -1
* DDI_DMA_NOMAPPING -2
* DDI_DMA_TOOBIG -3
*/
int
{
int ret;
return (DDI_DMA_NORESOURCES);
return (DDI_DMA_NOMAPPING);
goto freehandle;
goto freehandle;
switch (PCI_DMA_TYPE(mp)) {
case DMAI_FLAGS_DVMA: /* LINTED E_EQUALITY_NOT_ASSIGNMENT */
goto freehandle;
if (PCI_DMA_CANFAST(mp)) {
break;
/* LINTED E_NOP_ELSE_STMT */
} else {
}
}
goto freehandle;
break;
case DMAI_FLAGS_PEER_TO_PEER: /* LINTED E_EQUALITY_NOT_ASSIGNMENT */
goto freehandle;
break;
case DMAI_FLAGS_BYPASS:
default:
panic("%s%d: pci_dma_setup: bad dma type 0x%x",
PCI_DMA_TYPE(mp));
/*NOTREACHED*/
}
if (ret == DDI_DMA_NORESOURCES)
else
return (ret);
}
/*
* bus dma alloc handle entry point:
*/
int
{
int rval;
return (DDI_DMA_BADATTR);
return (DDI_DMA_NORESOURCES);
/*
* Save requestor's information
*/
/* check and convert dma attributes to handle parameters */
return (rval);
}
return (DDI_SUCCESS);
}
/*
* bus dma free handle entry point:
*/
/*ARGSUSED*/
int
{
if (pci_kmem_clid) {
}
return (DDI_SUCCESS);
}
/*
* bus dma bind handle entry point:
*/
int
{
int ret;
return (DDI_DMA_INUSE);
goto err;
goto err;
switch (PCI_DMA_TYPE(mp)) {
case DMAI_FLAGS_DVMA:
goto map_err;
if (PCI_DMA_CANFAST(mp)) {
goto mapped; /*LINTED E_NOP_ELSE_STMT*/
} else {
}
}
goto map_err;
*ccountp = 1;
break;
case DMAI_FLAGS_BYPASS:
case DMAI_FLAGS_PEER_TO_PEER:
goto map_err;
break;
default:
panic("%s%d: pci_dma_bindhdl(%p): bad dma type",
/*NOTREACHED*/
}
err:
return (ret);
}
/*
* bus dma unbind handle entry point:
*/
/*ARGSUSED*/
int
{
return (DDI_FAILURE);
}
switch (PCI_DMA_TYPE(mp)) {
case DMAI_FLAGS_DVMA:
break;
case DMAI_FLAGS_BYPASS:
case DMAI_FLAGS_PEER_TO_PEER:
break;
default:
panic("%s%d: pci_dma_unbindhdl:bad dma type %p",
/*NOTREACHED*/
}
if (iommu_p->iommu_dvma_clid != 0) {
}
if (pci_kmem_clid) {
}
SYNC_BUF_PA(mp) = 0;
return (DDI_SUCCESS);
}
/*
* bus dma win entry point:
*/
int
{
return (DDI_FAILURE);
}
switch (PCI_DMA_TYPE(mp)) {
case DMAI_FLAGS_DVMA:
/* map_window sets dmai_mapping/size/offset */
}
if (cookiep)
if (ccountp)
*ccountp = 1;
break;
case DMAI_FLAGS_PEER_TO_PEER:
case DMAI_FLAGS_BYPASS: {
int i;
;
win_p->win_curseg = 0;
if (ccountp)
}
break;
default:
PCI_DMA_TYPE(mp));
return (DDI_FAILURE);
}
if (cookiep)
"cookie - dmac_address=%x dmac_size=%x\n",
if (offp)
if (lenp)
return (DDI_SUCCESS);
}
#ifdef DEBUG
static char *pci_dmactl_str[] = {
"DDI_DMA_FREE",
"DDI_DMA_SYNC",
"DDI_DMA_HTOC",
"DDI_DMA_KVADDR",
"DDI_DMA_MOVWIN",
"DDI_DMA_REPWIN",
"DDI_DMA_GETERR",
"DDI_DMA_COFF",
"DDI_DMA_NEXTWIN",
"DDI_DMA_NEXTSEG",
"DDI_DMA_SEGTOC",
"DDI_DMA_RESERVE",
"DDI_DMA_RELEASE",
"DDI_DMA_RESETH",
"DDI_DMA_CKSYNC",
"DDI_DMA_IOPB_ALLOC",
"DDI_DMA_IOPB_FREE",
"DDI_DMA_SMEM_ALLOC",
"DDI_DMA_SMEM_FREE",
"DDI_DMA_SET_SBUS64",
"DDI_DMA_REMAP"
};
#endif
/*
* bus dma control entry point:
*/
int
{
switch (cmd) {
case DDI_DMA_FREE:
return (DDI_SUCCESS);
case DDI_DMA_RESERVE: {
}
case DDI_DMA_RELEASE: {
}
default:
break;
}
switch (PCI_DMA_TYPE(mp)) {
case DMAI_FLAGS_DVMA:
cache_flags));
case DMAI_FLAGS_PEER_TO_PEER:
case DMAI_FLAGS_BYPASS:
cache_flags));
default:
panic("%s%d: pci_dma_ctlops(%x):bad dma type %x",
mp->dmai_flags);
/*NOTREACHED*/
}
}
#ifdef DEBUG
int pci_peekfault_cnt = 0;
int pci_pokefault_cnt = 0;
#endif /* DEBUG */
static int
{
/* Set up protected environment. */
} else
err = DDI_FAILURE;
/*
* Read the async fault register for the PBM to see it sees
* a master-abort.
*/
err = DDI_FAILURE;
/* Take down protected environment. */
no_trap();
#ifdef DEBUG
if (err == DDI_FAILURE)
#endif
return (err);
}
static int
{
/*
* Note that i_ndi_busop_access_enter ends up grabbing the pokefault
* mutex.
*/
switch (size) {
case sizeof (uint8_t):
break;
case sizeof (uint16_t):
break;
case sizeof (uint32_t):
break;
case sizeof (uint64_t):
break;
}
if (flags == DDI_DEV_AUTOINCR)
}
}
/* Clear the expected fault from the handle before returning */
return (DDI_FAILURE);
}
return (DDI_SUCCESS);
}
static int
{
}
static int
{
} else
err = DDI_FAILURE;
no_trap();
#ifdef DEBUG
if (err == DDI_FAILURE)
#endif
return (err);
}
static int
{
(void *)host_addr);
if (flags == DDI_DEV_AUTOINCR)
}
} else {
int i;
for (i = 0; i < size; i++)
*ff_addr++ = 0xff;
err = DDI_FAILURE;
}
return (err);
}
static int
{
}
/*
* get_reg_set_size
*
* Given a dev info pointer to a pci child and a register number, this
* routine returns the size element of that reg set property.
* return value: size of reg set on success, -1 on error
*/
static off_t
{
int i;
if (rnumber < 0)
return (-1);
/*
* Get the reg property for the device.
*/
return (-1);
if (rnumber >= (i / (int)sizeof (pci_regspec_t))) {
return (-1);
}
return (size);
}
/*
* control ops entry point:
*
* Requests handled completely:
* DDI_CTLOPS_INITCHILD see init_child() for details
* DDI_CTLOPS_UNINITCHILD
* DDI_CTLOPS_REPORTDEV see report_dev() for details
* DDI_CTLOPS_IOMIN cache line size if streaming otherwise 1
* DDI_CTLOPS_REGSIZE
* DDI_CTLOPS_NREGS
* DDI_CTLOPS_DVMAPAGESIZE
* DDI_CTLOPS_POKE
* DDI_CTLOPS_PEEK
* DDI_CTLOPS_QUIESCE
* DDI_CTLOPS_UNQUIESCE
*
* All others passed to parent.
*/
int
{
switch (op) {
case DDI_CTLOPS_INITCHILD:
case DDI_CTLOPS_UNINITCHILD:
case DDI_CTLOPS_REPORTDEV:
return (report_dev(rdip));
case DDI_CTLOPS_IOMIN:
/*
* If we are using the streaming cache, align at
* least on a cache line boundary. Otherwise use
* whatever alignment is passed in.
*/
}
return (DDI_SUCCESS);
case DDI_CTLOPS_REGSIZE:
case DDI_CTLOPS_NREGS:
return (DDI_SUCCESS);
case DDI_CTLOPS_DVMAPAGESIZE:
return (DDI_SUCCESS);
case DDI_CTLOPS_POKE:
case DDI_CTLOPS_PEEK:
result));
case DDI_CTLOPS_AFFINITY:
break;
case DDI_CTLOPS_QUIESCE:
case DDI_CTLOPS_UNQUIESCE:
default:
break;
}
/*
* Now pass the request up to our parent.
*/
}
/* ARGSUSED */
int
{
switch (intr_op) {
case DDI_INTROP_GETCAP:
/* GetCap will always fail for all non PCI devices */
break;
case DDI_INTROP_SETCAP:
ret = DDI_ENOTSUP;
break;
case DDI_INTROP_ALLOC:
break;
case DDI_INTROP_FREE:
break;
case DDI_INTROP_GETPRI:
break;
case DDI_INTROP_SETPRI:
break;
case DDI_INTROP_ADDISR:
break;
case DDI_INTROP_REMISR:
break;
case DDI_INTROP_GETTARGET:
break;
case DDI_INTROP_SETTARGET:
ret = DDI_ENOTSUP;
break;
case DDI_INTROP_ENABLE:
break;
case DDI_INTROP_DISABLE:
break;
case DDI_INTROP_SETMASK:
break;
case DDI_INTROP_CLRMASK:
break;
case DDI_INTROP_GETPENDING:
break;
case DDI_INTROP_NINTRS:
case DDI_INTROP_NAVAIL:
break;
/* PCI nexus driver supports only fixed interrupts */
DDI_INTR_TYPE_FIXED : 0;
break;
default:
ret = DDI_ENOTSUP;
break;
}
return (ret);
}
static void
{
/*
* Before initializing hotplug - open up
* bus range. The busra module will
* initialize its pool of bus numbers from
* this. "busra" will be the agent that keeps
* track of them during hotplug. Also, note,
* that busra will remove any bus numbers
* already in use from boot time.
*/
/*
* If this property exists, this nexus has hot-plug
* slots.
*/
"hotplug-capable")) {
dip, "bus-range",
(int *)&bus_range,
2) != DDI_PROP_SUCCESS) {
return;
}
return;
}
}
}
}