/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2008 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* cb ops
*/
/*
* dev ops
*/
seeprom_open, /* open */
seeprom_close, /* close */
nodev, /* strategy */
nodev, /* print */
nodev, /* dump */
seeprom_read, /* read */
seeprom_write, /* write */
nodev, /* ioctl */
nodev, /* devmap */
nodev, /* mmap */
nodev, /* segmap */
nochpoll, /* poll */
ddi_prop_op, /* cb_prop_op */
NULL, /* streamtab */
CB_REV, /* rev */
nodev, /* int (*cb_aread)() */
nodev /* int (*cb_awrite)() */
};
0,
NULL,
ddi_quiesce_not_needed, /* quiesce */
};
&mod_driverops, /* type of module - driver */
"I2C serial EEPROM device driver",
};
0
};
/*
* globals
*/
static void *seepromsoft_statep;
int
_init(void)
{
int error;
sizeof (struct seepromunit), 1)) != 0)
return (error);
return (error);
}
return (error);
}
int
_fini(void)
{
int error;
if (error == 0) {
}
return (error);
}
int
{
}
static int
{
int instance;
return (DDI_FAILURE);
}
return (DDI_FAILURE);
}
return (DDI_FAILURE);
}
} else {
/*
* Default is i2c-at24c64
*/
}
return (DDI_SUCCESS);
}
static int
{
switch (cmd) {
case DDI_ATTACH:
return (seeprom_do_attach(dip));
case DDI_RESUME:
/*
* No state to restore.
*/
return (DDI_SUCCESS);
default:
return (DDI_FAILURE);
}
}
static int
{
struct seepromunit *unitp;
switch (infocmd) {
case DDI_INFO_DEVT2DEVINFO:
return (DDI_FAILURE);
}
return (DDI_SUCCESS);
case DDI_INFO_DEVT2INSTANCE:
return (DDI_SUCCESS);
default:
return (DDI_FAILURE);
}
}
static int
{
int instance;
return (DDI_SUCCESS);
}
static int
{
switch (cmd) {
case DDI_DETACH:
return (seeprom_do_detach(dip));
case DDI_SUSPEND:
/*
* No state to save. IO will be blocked by nexus.
*/
return (DDI_SUCCESS);
default:
return (DDI_FAILURE);
}
}
static int
{
struct seepromunit *unitp;
int instance;
int err = 0;
return (EINVAL);
}
unitp = (struct seepromunit *)
return (ENXIO);
}
if (unitp->seeprom_oflag != 0) {
} else {
}
} else {
} else {
}
}
return (err);
}
static int
{
struct seepromunit *unitp;
int instance;
unitp = (struct seepromunit *)
return (ENXIO);
}
unitp->seeprom_oflag = 0;
return (DDI_SUCCESS);
}
static int
{
}
static int
{
}
static int
{
int seeprom_addr;
int bytes_to_rw;
int err = 0;
int current_xfer_len;
int actual_data_xfer;
unitp = (struct seepromunit *)
return (ENXIO);
}
/*
* Exceeded seeprom size.
*/
return (ENXIO);
}
return (0);
}
/*
* Serialize access here to prevent a transaction starting
* until after 20 ms delay if last operation was a write.
*/
&unitp->seeprom_mutex) <= 0) {
return (EINTR);
}
}
while ((bytes_to_rw != 0) && (err == 0)) {
&i2ctp,
0,
i2ctp);
break;
}
} else {
/*
* not all bytes were sent in previous attempt.
* Adjust the write pointer to the unsent data.
*/
/*LINTED*/
/*LINTED*/
}
} else {
}
I2C_SUCCESS) {
break;
}
if (i2ctp->i2c_w_resid == 0) {
}
/*
* 20 ms(20000 Microsec) delay is required before
* issuing another transaction. This enforces that
* wait.
*/
} else {
/*
* SEEPROM read. First write out the address to read.
*/
} else {
}
I2C_SUCCESS) {
break;
}
}
}
unitp->seeprom_flags = 0;
return (err);
}