/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2008 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* This is the client driver for the ics951601 device which is a general
* purpose clock generator. Setting a clock to 1 enables the clock while
* setting it to 0 disables it. All clocks are enabled by default by
* the driver. The user can read a clock, enable it or disable it.
* The command sent as an ioctl argument should be the bitwise OR of the
* clock number and the action upon it. The supported clock numbers and
* actions are defined in ics951601.h. A pointer to an integer is sent
* as the third ioctl argument. If the clock is to be read the value of the
* clock is copied into it and if it is to be modified the integer referred
* to should have the appropriate value of either 1 or 0.
*/
/*
* cb ops
*/
/*
* dev ops
*/
ics951601_open, /* open */
ics951601_close, /* close */
nodev, /* strategy */
nodev, /* print */
nodev, /* dump */
nodev, /* read */
nodev, /* write */
ics951601_ioctl, /* ioctl */
nodev, /* devmap */
nodev, /* mmap */
nodev, /* segmap */
nochpoll, /* poll */
ddi_prop_op, /* cb_prop_op */
NULL, /* streamtab */
};
0,
NULL,
NULL,
ddi_quiesce_not_needed, /* quiesce */
};
&mod_driverops, /* type of module - driver */
"ics951601 device driver",
};
0
};
/*
* Writes to the clock generator involve sending the dummy command code, the
* dummy byte count followed by byte 0 through byte 5. The dummy command code
* and the dummy byte count are ignored by the ICS clock but must be sent.
*
* On reading from the clock generator, the controller will first receive a
* byte count followed by byte 0 through byte 5.
*/
/*
* The array for initializing the internal registers at attach time.
*/
0x0, /* Dummy command code */
0x7, /* Dummy byte count */
0x0, /* Initial value for functionality register */
0xff, /* Initial value for PCI1A stop clocks register */
0xff, /* Initial value for PCI2A stop clocks register */
0xff, /* Initial value for PCI2B stop clocks register */
0xff, /* Default value for reserved register */
0xef /* Default value for latched input read back register */
};
static void *ics951601_soft_statep;
int ics951601_debug = 0;
int
_init(void)
{
int err;
if (err == 0) {
(void) ddi_soft_state_init(&ics951601_soft_statep,
sizeof (ics951601_unit_t), 1);
}
return (err);
}
int
_fini(void)
{
int err;
if (err == 0) {
}
return (err);
}
int
{
}
static int
{
int instance;
/*
* Make sure the open is for the right file type
*/
return (EINVAL);
}
if (instance < 0) {
return (ENXIO);
}
instance);
return (ENXIO);
}
/* must be privileged to access this device */
return (EPERM);
}
/*
* Enforce exclusive access if required
*/
if (icsp->ics951601_oflag == 0) {
err = DDI_SUCCESS;
}
err = DDI_SUCCESS;
}
return (err);
}
static int
{
int instance;
/*
* Make sure the close is for the right file type
*/
return (EINVAL);
}
instance);
return (ENXIO);
}
icsp->ics951601_oflag = 0;
return (DDI_SUCCESS);
}
static int
{
return (DDI_FAILURE);
}
return (DDI_FAILURE);
}
goto ATTACH_ERR;
}
/*
* preallocate a single buffer for all reads and writes
*/
0, 0, I2C_SLEEP) != I2C_SUCCESS) {
goto CREATE_NODE_ERR;
}
goto ALLOC_ERR;
}
/* Enable all clocks */
!= I2C_SUCCESS) {
goto REG_ERR;
}
/*
* Store the dip for future use
*/
return (DDI_SUCCESS);
return (DDI_FAILURE);
}
static void
{
int instance;
}
static int
{
switch (cmd) {
case DDI_INFO_DEVT2DEVINFO:
return (DDI_FAILURE);
}
return (DDI_SUCCESS);
case DDI_INFO_DEVT2INSTANCE:
return (DDI_SUCCESS);
default:
return (DDI_FAILURE);
}
}
static int
{
/*
* Set the busy flag so that future transactions block
* until resume.
*/
&icsp->ics951601_mutex) <= 0) {
return (DDI_FAILURE);
}
}
!= I2C_SUCCESS) {
return (EIO);
}
return (DDI_SUCCESS);
}
static int
{
icsp = (ics951601_unit_t *)
return (ENXIO);
}
/*
* Restore registers to status existing before cpr
*/
!= I2C_SUCCESS) {
}
/*
* Clear busy flag so that transactions may continue
*/
return (err);
}
static int
{
switch (cmd) {
case DDI_ATTACH:
return (ics951601_attach(dip));
case DDI_RESUME:
return (ics951601_resume(dip));
default:
return (DDI_FAILURE);
}
}
static int
{
switch (cmd) {
case DDI_DETACH:
return (DDI_SUCCESS);
case DDI_SUSPEND:
return (ics951601_suspend(dip));
default:
return (DDI_FAILURE);
}
}
static int
int *rvalp)
{
int err = 0;
int reg_no;
int ics_temp;
temp_arr[0] = 0x0;
icsp = (ics951601_unit_t *)
if (ics951601_debug) {
}
/*
* We serialize here and block if there are pending transacations .
*/
&icsp->ics951601_mutex) <= 0) {
return (EINTR);
}
}
!= I2C_SUCCESS) {
err = DDI_FAILURE;
goto cleanup;
}
switch (ICS951601_CMD_TO_ACTION(cmd)) {
case ICS951601_READ_CLOCK:
sizeof (int), mode);
goto cleanup;
case ICS951601_MODIFY_CLOCK:
sizeof (int), mode) != DDI_SUCCESS) {
goto cleanup;
}
if (ics_temp == ICS951601_CLOCK_SET) {
} else if (ics_temp == ICS951601_CLOCK_CLEAR) {
} else {
goto cleanup;
}
break;
default:
goto cleanup;
}
!= I2C_SUCCESS) {
err = DDI_FAILURE;
goto cleanup;
}
return (err);
}