/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* cb ops
*/
/*
* dev ops
*/
void **result);
grfans_open, /* open */
grfans_close, /* close */
nodev, /* strategy */
nodev, /* print */
nodev, /* dump */
grfans_read, /* read */
grfans_write, /* write */
nodev, /* ioctl */
nodev, /* devmap */
nodev, /* mmap */
nodev, /* segmap */
nochpoll, /* poll */
ddi_prop_op, /* cb_prop_op */
NULL, /* streamtab */
CB_REV, /* rev */
nodev, /* int (*cb_aread)() */
nodev /* int (*cb_awrite)() */
};
0,
NULL, /* bus_ops */
NULL, /* power */
ddi_quiesce_not_needed, /* quiesce */
};
&mod_driverops, /* type of module - driver */
"grfans device driver",
};
0
};
static void *grfans_soft_statep;
static int grfans_debug = 0;
int
_init(void)
{
int error;
if (error == 0) {
(void) ddi_soft_state_init(&grfans_soft_statep,
sizeof (struct grfans_unit), 1);
}
return (error);
}
int
_fini(void)
{
int error;
if (error == 0) {
}
return (error);
}
int
{
}
/* ARGSUSED */
static int
{
int instance;
if (infocmd == DDI_INFO_DEVT2INSTANCE) {
return (DDI_SUCCESS);
}
return (DDI_FAILURE);
}
static int
{
int instance;
int nregs;
return (DDI_FAILURE);
}
if (grfans_debug) {
}
return (DDI_FAILURE);
instance);
if (grfans_debug) {
printf("number of registers is %d\n",
}
if (ddi_regs_map_setup(dip, 0,
"0", name);
return (DDI_FAILURE);
}
"1", name);
return (DDI_FAILURE);
}
" for cpu fan", name);
return (DDI_FAILURE);
}
" for system fan", name);
return (DDI_FAILURE);
}
return (DDI_SUCCESS);
}
static int
{
switch (cmd) {
case DDI_ATTACH:
return (grfans_do_attach(dip));
case DDI_RESUME:
return (DDI_SUCCESS);
default:
return (DDI_FAILURE);
}
}
static int
{
int instance;
return (DDI_SUCCESS);
}
static int
{
switch (cmd) {
case DDI_DETACH:
return (grfans_do_detach(dip));
case DDI_SUSPEND:
return (DDI_SUCCESS);
default:
return (DDI_FAILURE);
}
}
/*ARGSUSED*/
static int
{
int err = 0;
int channel;
/*
* must be privileged to access this device
*/
return (EPERM);
if (instance < 0) {
instance);
return (ENXIO);
}
instance);
return (ENXIO);
}
return (EINVAL);
else
} else {
else
}
return (err);
}
/*ARGSUSED*/
static int
{
int channel;
if (instance < 0)
return (ENXIO);
return (ENXIO);
return (DDI_SUCCESS);
}
/*ARGSUSED*/
static int
{
}
/*ARGSUSED*/
static int
{
}
static int
{
int ret = 0;
if (instance < 0)
return (ENXIO);
if (len == 0)
return (0);
return (ENXIO);
else
if (*outputaddr == UNKNOWN_OUT)
return (EIO);
}
/*
* rw == B_WRITE.
*/
uiop)) == 0) {
/*
* Check bounds for cpu fan
*/
if (req_value == 0) {
out_value = 0;
} else if (req_value <= 25) {
out_value = 25;
} else if (req_value <= 50) {
out_value = 50;
} else if (req_value <= 75) {
out_value = 75;
} else if (req_value <= 100) {
out_value = 100;
} else
*outputaddr = out_value;
unitp->cpufan_reg);
unitp->cpufan_reg);
if (grfans_debug) {
printf("set output to %d at addr %p\n",
(void *)unitp->cpufan_reg);
}
}
} else {
if (req_value == 0) {
out_value = 0;
} else if (req_value > 0) {
out_value = 100;
} else {
}
*outputaddr = out_value;
unitp->sysfan_reg);
if (grfans_debug) {
printf("set SYSFAN output to %d at "
"addr %p\n", out_value,
(void *)unitp->sysfan_reg);
}
}
}
} else {
}
return (ret);
}