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#
# Copyright 2005 Sun Microsystems, Inc. All rights reserved.
# Use is subject to license terms.
#
#pragma ident "%Z%%M% %I% %E% SMI"
#
name="ppm" parent="pseudo" instance=0;
#
# ppm configuration format
#
# "ppm-domains" - in form of "domain_xxx" where "xxx" string highlights
# the nature of the domain;
#
# "domain_xxx-model" - PM model: CPU, PCI, PCI_PROP, FET or LED.
#
# "domain_xxx-propname" - a property name that is exported by device in
# a domain. Currently, it is used by PCI_PROP model to identify devices
# that are to have their clocks stopped when all power-manageable devices
# in the domain are at D3 power level.
#
# "domain-xxx-devices" - a list of prom path match patterns to match devices
# that fall into "domain_xxx", where wildcard '*' is allowed by observing
# the following expectations:
# . a single wildcard with exact match up to (but exclude) the wildcard
# which then terminates the match pattern;
# . a single wildcard that does not terminate a match pattern must
# match driver name (followed by '@');
# . with two wildcard occurences, the first is to match driver name,
# the second function id, as well as the last character of the match
# pattern.
#
# "domain-xxx-ctrl" - blank space separated definitions in the form of
# keyword=definition [keyword=definition...]
# The keywords are as follows, where 'method' must come before mask as it
# tells how to store 'mask' and 'val'. Missing 'val' defaults to 0.
#
# which keywords apply depends on cmd. There are two sets as shown below.
# Here is the first:
# cmd=[CPU_GO | LED_ON | LED_OFF | FET_ON | FET_OFF | CLK_ON | CLK_OFF]
# path=<prompath> - control device's prom pathname (includes minor)
# method=[KIO|I2CKIO] This selects a method which may be
# an ioctl that sets a single value or an i2c ioctl that
# takes a value and a mask to access gpio register
# iord=<integer> - value of ioctl command for reading
# iowr=<integer> - value of ioctl command for writing
# val=<integer> - a single integer value, generally the value to which
# the relevant bits of a register will be set
# mask=<integer> - which bits of val are relevant (if method is I2CKIO)
#
# Here is the second:
# cmd=[CPU_NEXT | PRE_CHNG | POST_CHNG]
# path=<prompath> - control device's prom pathname, including minor
# method=[CPUSPEEDKIO | VCORE] This selects a method that uses
# information like cpu speed index, value for
# adjust cpu core voltage, delays, etc.
# iowr=<integer> - value of ioctl write command
# speeds=<integer> - indicates the number of cpu speeds that are
# supported
ppm-domains="domain_cpu", "domain_scsifet1", "domain_scsifet2",
"domain_idefet", "domain_led", "domain_pcislot_0", "domain_pcislot_1",
"domain_pcislot_2", "domain_pcislot_3", "domain_pcislot_4",
"domain_pcislot_5";
#
# 0x6a02 is JBPPMIOC_NEXT (('j' << 8) | 2)
# 0x6a03 is JBPPMIOC_GO (('j' << 8) | 3)
# 0x6c02 is M1535PPMIOC_SET (('l' << 8) | 2)
# 'delay' unit is us(microsecond)
#
domain_cpu-devices="/SUNW,UltraSPARC-IIIi@*";
domain_cpu-model="CPU";
domain_cpu-control=
"cmd=CPU_NEXT path=/ppm@1e,0:jbus-ppm method=CPUSPEEDKIO iowr=0x6a02 speeds=3",
"cmd=CPU_NEXT path=/ppm@1c,0:jbus-ppm method=CPUSPEEDKIO iowr=0x6a02 speeds=3",
"cmd=PRE_CHNG path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo32 method=VCORE iowr=0x6c02 iord=0x6c01 val=4 delay=150000",
"cmd=CPU_GO path=/ppm@1e,0:jbus-ppm method=KIO iowr=0x6a03 val=0",
"cmd=POST_CHNG path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo32 method=VCORE iowr=0x6c02 iord=0x6c01 val=5";
#
# iowr -- 0x4D82 is GPIO_SET_OUTPUT per sys/i2c/clients/i2c_gpio.h file
# iord -- 0x4D80 is GPIO_GET_INPUT per sys/i2c/clients/i2c_gpio.h file
# mask -- bit mask for control pin
# val -- pin value to set on/off
# delay -- minimum delay between FET off and FET on
# post_delay -- delay after turning on/off the FET
#
domain_scsifet1-devices = "/pci@1d,700000/scsi@3/sd@0,0", "/pci@1d,700000/scsi@4/sd@0,0";
domain_scsifet1-model = "FET";
domain_scsifet1-control =
"cmd=FET_ON path=/pci@1e,600000/isa@7/i2c@0,320/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x80 val=0x80 post_delay=1500000",
"cmd=FET_OFF path=/pci@1e,600000/isa@7/i2c@0,320/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x80 val=0";
domain_scsifet2-devices = "/pci@1d,700000/scsi@3/sd@1,0", "/pci@1d,700000/scsi@4/sd@1,0";
domain_scsifet2-model = "FET";
domain_scsifet2-control =
"cmd=FET_ON path=/pci@1e,600000/isa@7/i2c@0,320/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x02 val=0x02 post_delay=1500000",
"cmd=FET_OFF path=/pci@1e,600000/isa@7/i2c@0,320/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x02 val=0";
#
# If we power up ide fet after powering up uata controller, atapi ide dvd
# stuck at low power - a problem under investigation. Until the problem is
# solved, we work around it by applying the fet to ide controller.
#
domain_idefet-devices = "/pci@1e,600000/ide@d";
domain_idefet-model = "FET";
domain_idefet-control =
"cmd=FET_ON path=/pci@1e,600000/isa@7/i2c@0,320/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x10 val=0x10 delay=1000000 post_delay=1000000",
"cmd=FET_OFF path=/pci@1e,600000/isa@7/i2c@0,320/gpio@0,30:pca9556_0 method=I2CKIO iowr=0x4D82 iord=0x4D80 mask=0x10 val=0";
#
# iord -- 0x6c01 is M1535PPMIOC_GET (('l' << 8) | 1)
# iowr -- 0x6c02 is M1535PPMIOC_SET (('l' << 8) | 2)
#
# Enchilada: SPLED drive low
# Grover: SPLED driver high
# note: no device to claim in this domain
#
domain_led-devices = "";
domain_led-model = "LED";
domain_led-control =
"cmd=LED_ON path=/pci@1e,600000/pmu@6/ppm@0,b3:spled method=KIO iowr=0x6c02 iord=0x6c01 val=0",
"cmd=LED_OFF path=/pci@1e,600000/pmu@6/ppm@0,b3:spled method=KIO iowr=0x6c02 iord=0x6c01 val=1";
#
# Note, in ppm.conf file, the pci slot is counted from the inner most
# slot toward outer most in increasing order, according to Enchilada
# motherboard schematic. The onboard physical slots however, may have
# been labled differently - it's been said that prior to rev G, the
# slots are labeled/counted from inside to outside, but starting from
# rev G slots will be labeled/counted from outside to inside.
#
# slot 0, PCI2B segment, 66mhz
# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI2B_1) = 0x2540
# iord = (ICS951601_READ_CLOCK | ICS951601_PCI2B_1) = 0x1540
#
domain_pcislot_0-devices = "/pci@1f,700000/*@2,*", "/pci@1f,700000/*@2";
domain_pcislot_0-model = "PCI";
domain_pcislot_0-control =
"cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2540 iord=0x1540 val=1",
"cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2540 iord=0x1540 val=0";
#
# slot 1, PCI2A segment, 33mhz
# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_5) = 0x2320
#
domain_pcislot_1-devices = "/pci@1e,600000/*@2,*", "/pci@1e,600000/*@2";
domain_pcislot_1-model = "PCI_PROP";
domain_pcislot_1-propname = "nonidle-bus-clock-pm";
domain_pcislot_1-control =
"cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2320 iord=0x1320 val=1",
"cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2320 iord=0x1320 val=0";
#
# slot 2, PCI1A segment, 66mhz
# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI2A_0) = 0x2420
#
domain_pcislot_2-devices = "/pci@1c,600000/*@2,*", "/pci@1c,600000/*@2";
domain_pcislot_2-model = "PCI_PROP";
domain_pcislot_2-propname = "nonidle-bus-clock-pm";
domain_pcislot_2-control =
"cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2420 iord=0x1420 val=1",
"cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2420 iord=0x1420 val=0";
#
# slot 3, PCI1B segment, 66mhz
# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1B_0) = 0x2404
#
domain_pcislot_3-devices = "/pci@1d,700000/*@2,*", "/pci@1d,700000/*@2";
domain_pcislot_3-model = "PCI_PROP";
domain_pcislot_3-propname = "nonidle-bus-clock-pm";
domain_pcislot_3-control =
"cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2404 iord=0x1404 val=1",
"cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2404 iord=0x1404 val=0";
#
# slot 4, PCI2A segment, 33mhz
# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_1) = 0x2302
#
domain_pcislot_4-devices = "/pci@1e,600000/*@3,*", "/pci@1e,600000/*@3";
domain_pcislot_4-model = "PCI_PROP";
domain_pcislot_4-propname = "nonidle-bus-clock-pm";
domain_pcislot_4-control =
"cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2302 iord=0x1302 val=1",
"cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2302 iord=0x1302 val=0";
#
# slot 5, PCI2A segment, 33mhz
# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_2) = 0x2304
#
domain_pcislot_5-devices = "/pci@1e,600000/*@4,*", "/pci@1e,600000/*@4";
domain_pcislot_5-model = "PCI_PROP";
domain_pcislot_5-propname = "nonidle-bus-clock-pm";
domain_pcislot_5-control =
"cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2304 iord=0x1304 val=1",
"cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2304 iord=0x1304 val=0";