/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2004 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SYS_SCSI_ADAPTERS_FASVAR_H
#define _SYS_SCSI_ADAPTERS_FASVAR_H
#pragma ident "%Z%%M% %I% %E% SMI"
/*
* QLogic FAS (Enhanced Scsi Processor) Definitions,
* Software && Hardware.
*/
#ifdef __cplusplus
extern "C" {
#endif
/*
* Compile options
*/
#if DEBUG
#define FASTEST
#endif /* DEBUG */
/*
* Software Definitions
*/
/*
* Data Structure for this Host Adapter.
*
* structure to hold active outstanding cmds
*/
struct f_slots {
int f_timeout;
int f_timebase;
/* t_slot size is 1 for non-tagged, and */
/* 256 for tagged targets */
};
/*
* HBA interface macros
*/
/*
* soft state information for this host adapter
*/
struct fas {
int f_instance;
/*
* Transport structure for this instance of the hba
*/
/*
* dev_info_t reference
*/
/*
* mutex to protect softstate and hw regs
*/
/*
* Interrupt block cookie
*/
/*
* Next in a linked list of host adapters
*/
/*
* Type byte for this host adapter
* and rev of the FEPS chip
*/
/*
* value for configuration register 1.
* Also contains Initiator Id.
*/
/*
* value for configuration register 2
*/
/*
* value for configuration register 3
*/
/*
* clock conversion register value for this host adapter.
* clock cycle value * 1000 for this host adapter,
* to retain 5 significant digits.
*/
/*
* selection timeout register value
*/
/*
* State of the host adapter
*/
/* zeroed for every selection attempt, */
/* every reconnection, and every disconnect */
/* interrupt. Each SYNCHRONOUS DATA TRANSFER */
/* message, both coming from the target, and */
/* sent to the target, causes this tag to be */
/* incremented. This allows the received */
/* message handling to determine whether */
/* a received SYNCHRONOUS DATA TRANSFER */
/* message is in response to one that we */
/* sent. */
/* went out */
/*
* Message handling: enough space is reserved for the expected length
* of all messages we could either send or receive.
*
* For sending, we expect to send only SYNCHRONOUS extended messages
* (5 bytes). We keep a history of the last message sent, and in order
* to control which message to send, an output message length is set
* to indicate whether and how much of the message area is to be used
* in sending a message. If a target shifts to message out phase
* unexpectedly, the default action will be to send a MSG_NOP message.
*
* After the successful transmission of a message, the initial message
* byte is moved to the f_last_msgout area for tracking what was the
* last message sent.
*/
/*
* We expect, at, most, to receive a maximum of 7 bytes
* of an incoming extended message (MODIFY DATA POINTER),
* and thus reserve enough space for that.
*/
/*
* These are used to index how far we've
* gone in receiving incoming messages.
*/
/*
* Saved last msgin.
*/
/*
* round robin scheduling of requests in fas_ustart()
*/
/*
* save reselecting slot when waiting for tag bytes
*/
/*
* Target information
* Synchronous SCSI Information,
* Disconnect/reconnect capabilities
* Noise Susceptibility
*/
/*
* fifo length and fifo contents stored here before reading intr reg
*/
/*
* These ushort_t's are bit maps for targets
*/
/*
* This ushort_t is a bit map for targets to
* disable sync on request from the target driver
*/
/*
* This ushort_t is a bit map for targets who don't appear
* to be able to support tagged commands.
*/
/*
* This ushort_t is a bit map for targets who need to have
* their properties update deferred.
*/
/*
* scsi_options for bus and per target
*/
int f_scsi_options;
/*
* tag age limit per bus
*/
int f_scsi_tag_age_limit;
/*
* scsi reset delay per bus
*/
/*
* Scratch Buffer, allocated out of iopbmap for commands
* The same size as the FAS's fifo.
*/
/*
* shadow copy of dma_csr to avoid unnecessary I/O reads which are
* expensive
*/
/*
* Scratch Buffer DMA cookie and handle for cmdarea
*/
/*
* dma attrs for fas scsi engine
*/
/*
* critical counters
*/
/*
* Hardware pointers
*
* Pointer to mapped in FAS registers
*/
/*
* Pointer to mapped in DMA Gate Array registers
*/
/*
* last and current state, queues
*/
/*
* if throttle >= 0 then
* continue submitting cmds
* if throttle == 0 then hold cmds
* if throttle == -1 then drain
* if throttle == -2 do special handling
* for queue full
* f_throttle and f_tcmds are not part of
* f_active so fas_ustart() can walk thru
* these more efficiently
*/
/*
* number of disconnected + active commands
* (i.e. stored in the f_active list) for
* the slot
*/
/*
* if a device reset has been performed, a
* delay is required before accessing the target
* again; reset delays are in milli secs
* (assuming that reset watchdog runs every
* scsi-watchdog-tick milli secs;
* the watchdog decrements the reset delay)
*/
/*
* list for auto request sense packets
*/
/*
* queue of packets that need callback and other callback info
*/
int f_c_in_callback;
/*
* a queue for packets in case the fas mutex is locked
*/
/*
* list of reset notification requests
*/
/*
* qfull handling
*/
/*
* kmem cache for packets
*/
/*
* data access handle for register mapping
*/
/*
* data access handle for cmd area
*/
/*
* data access handle for dma
*/
/*
* state flags
*/
/*
*/
/*
* soft state flags
*/
/*
* quiesce timeout ID
*/
/*
* kstat_intr support
*/
#ifdef FASDEBUG
/*
* register trace for debugging
*/
#endif
};
/*
* kstat_intr support
*/
/*
* defaults for the global properties
*/
/*
* define for f_flags
*/
/*
* f_req_ack_delay:
*/
/*
* Representations of Driver states (stored in tags f_state && f_laststate).
*
* Totally idle. There may or may not disconnected commands still
* running on targets.
*/
/*
* Selecting States. These states represent a selection attempt
* for a target.
*/
/*
* When the driver is neither idle nor selecting, it is in one of
* the information transfer phases. These states are not unique
* bit patterns- they are simple numbers used to mark transitions.
* They must start at 1 and proceed sequentially upwards and
* match the indexing of function vectors declared in the function
* fas_phasemanage().
*/
/*
* These states cover finishing sending a command out (if it wasn't
* sent as a side-effect of selecting), or the case of starting
* a command that was linked to the previous command (i.e., no
* selection phase for this particular command as the target
* remained connected when the previous command completed).
*/
/*
* These states are the begin and end of sending out a message.
* The message to be sent is stored in the field f_msgout (see above).
*/
/*
* These states are the beginning, middle, and end of incoming messages.
*
*/
/*
* This state is reached when the target may be getting
* ready to clear the bus (disconnect or command complete).
*/
/*
* These states elide the begin and end of a DATA phase
*/
/*
* This state indicates that we were in status phase. We handle status
* phase by issuing the FAS command 'CMD_COMP_SEQ' which causes the
* FAS to read the status byte, and then to read a message in (presumably
* one of COMMAND COMPLETE, LINKED COMMAND COMPLETE or LINKED COMMAND
* COMPLETE WITH FLAG).
*
* This state is what is expected to follow after the issuance of the
* FAS command 'CMD_COMP_SEQ'.
*/
/*
* This state is used by the driver to indicate that it
* is in the middle of processing a reselection attempt.
*/
/*
* This state is used by the driver to indicate that it doesn't know
* what the next state is, and that it should look at the FAS's status
* register to find out what SCSI bus phase we are in in order to select
* the next state to transition to.
*/
/*
* This state is used by the driver to indicate that a self-inititated
* Bus reset is in progress.
*/
/*
* Hiwater mark of vectored states
*/
/*
* XXX - needs to distinguish between bus states and internal states
*/
/*
* This state is used by the driver to indicate to itself that it is
* in the middle of aborting things.
*/
/*
* This state is used by the driver to just hold the state of
* the softc structure while it is either aborting or resetting
* everything.
*/
/*
* Interrupt dispatch actions
*/
/*
* Proxy command definitions.
*
* At certain times, we need to run a proxy command for a target
* (if only to select a target and send a message).
*
* We use the tail end of the cdb that is internal to the fas_cmd
* structure to store the proxy code, the proxy data (e.g., the
* message to send).
*
* We also store a boolean result code in this area so that the
* user of a proxy command knows whether it succeeded.
*/
/*
* Offsets into the cmd_cdb[] array (in fas_cmd) for proxy data
*/
/*
* Currently supported proxy types
*/
/*
* Reset actions
*/
/* while resetting bus. */
/*
* f_softstate flags
*/
/*
* Debugging macros and defines
*/
#ifdef FASDEBUG
/*PRINTFLIKE2*/
__KPRINTFLIKE(2);
(fasdebug_instance == -1)))
(fasdebug_instance == -1)))
(fasdebug_instance == -1)))
#else /* FASDEBUG */
#endif /* FASDEBUG */
/*
* Shorthand macros and defines
*/
/*
* Short hand defines
*/
#define HOLD_THROTTLE 0
#define FALSE 0
/*
* Default is to have 10 retries on receiving QFULL status and
* each retry to be after 100 ms.
*/
/*
* FEPS chip revision
*/
/*
* Some manifest miscellaneous constants
*/
/*
* wide support
*/
fas_empty_waitQ(fas); \
} \
/*
* flags for fas_accept_pkt
*/
/*
* reset delay tick
*/
/*
* 2 ms timeout on receiving tag on reconnect
*/
/*
* auto request sense
*/
#ifdef __cplusplus
}
#endif
#endif /* _SYS_SCSI_ADAPTERS_FASVAR_H */