/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* Part of Intel(R) Manageability Engine Interface Linux driver
*
* Copyright (c) 2003 - 2008 Intel Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification.
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
* substantially similar to the "NO WARRANTY" disclaimer below
* ("Disclaimer") and any redistribution must be conditioned upon
* including a substantially similar Disclaimer requirement for further
* binary redistribution.
* 3. Neither the names of the above-listed copyright holders nor the names
* of any contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* Alternatively, this software may be distributed under the terms of the
* GNU General Public License ("GPL") version 2 as published by the Free
* Software Foundation.
*
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
*/
#ifndef _HECI_DATA_STRUCTURES_H_
#define _HECI_DATA_STRUCTURES_H_
#ifndef SUNOS
#define SUNOS
#endif
/*
* error code definition
*/
/*
* Number of queue lists used by this driver
*/
/*
* Maximum transmission unit (MTU) of heci messages
*/
#pragma pack(1)
/*
* HECI HW Section
*/
/* HECI registers */
/* H_CB_WW - Host Circular Buffer (CB) Write Window register */
#define H_CB_WW 0
/* H_CSR - Host Control Status register */
/* ME_CB_RW - ME Circular Buffer Read Window register (read only) */
/* ME_CSR_HA - ME Control Status Host Access register (read only) */
/* register bits of H_CSR (Host Control Status register) */
/* Host Circular Buffer Depth - maximum number of 32-bit entries in CB */
/* Host Circular Buffer Write Pointer */
/* Host Circular Buffer Read Pointer */
/* Host Reset */
/* Host Ready */
/* Host Interrupt Generate */
/* Host Interrupt Status */
/* Host Interrupt Enable */
/*
* register bits of ME_CSR_HA (ME Control Status Host Access register)
* ME CB (Circular Buffer) Depth HRA (Host Read Access)
* - host read only access to ME_CBD
*/
/* ME CB Write Pointer HRA - host read only access to ME_CBWP */
/* ME CB Read Pointer HRA - host read only access to ME_CBRP */
/* ME Reset HRA - host read only access to ME_RST */
/* ME Ready HRA - host read only access to ME_RDY */
/* ME Interrupt Generate HRA - host read only access to ME_IG */
/* ME Interrupt Status HRA - host read only access to ME_IS */
/* ME Interrupt Enable HRA - host read only access to ME_IE */
/* #define HECI_PTHI_MINOR_NUMBER 0 */
| ((instance) & 0xFF))
/*
* debug kernel print macro define
*/
#ifdef DEBUG
extern int heci_debug;
#else
#define DBG
#endif
if (!(expr)) { \
}
#define walk_list(p, n, h) \
p != (h); \
p = n, n = list_next(p))
}
#define list_del_init(n) { \
list_del(n); \
list_init(n); \
}
}
}
#ifdef __GNUC__
{ \
})
#else
/* type unsafe version */
#endif
/*
* time to wait HECI become ready after init
*/
/*
* watch dog definition
*/
struct guid {
};
/* File state */
enum file_state {
};
/* HECI device states */
enum heci_states {
HECI_INITIALIZING = 0,
};
enum iamthif_states {
};
enum heci_file_transaction_states {
};
/* HECI CB */
enum heci_cb_major_types {
HECI_READ = 0,
};
/* HECI user data struct */
struct heci_message_data {
char *data;
#ifndef _LP64
char *pad;
#endif
};
struct heci_file {
void * private_data;
};
struct heci_cb_private {
void *file_private;
unsigned long information;
unsigned long read_time;
};
struct io_heci_list {
int status;
};
struct heci_driver_version {
};
struct heci_client {
};
/*
* HECI BUS Interface Section
*/
struct heci_msg_hdr {
};
struct hbm_cmd {
};
struct heci_bus_message {
};
struct hbm_version {
};
struct hbm_host_version_request {
};
struct hbm_host_version_response {
};
struct hbm_host_stop_request {
};
struct hbm_host_stop_response {
};
struct hbm_me_stop_request {
};
struct hbm_host_enum_request {
};
struct hbm_host_enum_response {
};
struct heci_client_properties {
};
struct hbm_props_request {
};
struct hbm_props_response {
};
struct hbm_client_connect_request {
};
struct hbm_client_connect_response {
};
struct hbm_client_disconnect_request {
};
struct hbm_flow_control {
};
struct heci_me_client {
};
#pragma pack()
/* Private file struct */
struct heci_file_private {
int read_pending;
int status;
/* ID of client connected */
int sm_state;
};
/* private device struct */
struct iamt_heci_device {
/*
* lists of queues
*/
/* array of pointers to aio lists */
/* driver managed PTHI list for reading completed pthi cmd data */
/*
* list of files
*/
/*
* memory of device
*/
char *mem_addr;
/*
* lock for the device
*/
int recvd_msg;
/*
* hw states of host and fw(ME)
*/
/*
* waiting queue for receive message from FW
*/
/*
* heci device states
*/
int stop;
int host_buffer_is_empty;
int wd_pending;
int wd_stoped;
int asf_mode;
int iamthif_ioctl;
int iamthif_canceled;
int need_reset;
long open_handle_count;
};
/*
* read_heci_register - Read a byte from the heci device
*
* @device: the device structure
* @offset: offset from which to read the data
*
* @return the byte read.
*/
unsigned long offset);
/*
* write_heci_register - Write 4 bytes to the heci device
*
* @device: the device structure
* @offset: offset from which to write the data
* @value: the byte to write
*/
#endif /* _HECI_DATA_STRUCTURES_H_ */