/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
*/
#include <sys/cpu_acpi.h>
#include <sys/cpu_idle.h>
/*
* List of the processor ACPI object types that are being used.
*/
typedef enum cpu_acpi_obj {
PDC_OBJ = 0,
/*
* Container to store object name.
* Other attributes can be added in the future as necessary.
*/
typedef struct cpu_acpi_obj_attr {
char *name;
/*
* List of object attributes.
* NOTE: Please keep the ordering of the list as same as cpu_acpi_obj_t.
*/
{"_PDC"},
{"_PCT"},
{"_PSS"},
{"_PSD"},
{"_PPC"},
{"_PTC"},
{"_TSS"},
{"_TSD"},
{"_TPC"},
{"_CST"},
{"_CSD"}
};
/*
* Cache the ACPI CPU control data objects.
*/
static int
{
int i;
/*
* Fetch the control registers (if present) for the CPU node.
* Since they are optional, non-existence is not a failure
* (we just consider it a fixed hardware case).
*/
if (ACPI_FAILURE(astatus)) {
if (astatus == AE_NOT_FOUND) {
return (1);
}
goto out;
}
goto out;
}
/*
* Does the package look coherent?
*/
"%s package for CPU %d.",
goto out;
}
if (greg->DescriptorType !=
"error for CPU %d.",
goto out;
}
if (greg->ResourceLength !=
"size for CPU %d.",
goto out;
}
"address space type %x for CPU %d.",
goto out;
}
}
/*
* Looks good!
*/
}
ret = 0;
out:
return (ret);
}
/*
* Cache the ACPI _PCT data. The _PCT data defines the interface to use
* when making power level transitions (i.e., system IO ports, fixed
* hardware port, etc).
*/
static int
{
int ret;
return (ret);
}
/*
* Cache the ACPI _PTC data. The _PTC data defines the interface to use
* when making T-state transitions (i.e., system IO ports, fixed
* hardware port, etc).
*/
static int
{
int ret;
return (ret);
}
/*
* Cache the ACPI CPU state dependency data objects.
*/
static int
{
int number;
number = 6;
} else {
number = 5;
}
/*
* Fetch the dependencies (if present) for the CPU node.
* Since they are optional, non-existence is not a failure
* (it's up to the caller to determine how to handle non-existence).
*/
if (ACPI_FAILURE(astatus)) {
if (astatus == AE_NOT_FOUND) {
return (1);
}
goto out;
}
goto out;
}
/*
* For C-state domain, we assume C2 and C3 have the same
* domain information
*/
goto out;
}
goto out;
}
}
ret = 0;
out:
return (ret);
}
/*
* Cache the ACPI _PSD data. The _PSD data defines P-state CPU dependencies
* (think CPU domains).
*/
static int
{
int ret;
if (ret == 0)
return (ret);
}
/*
* Cache the ACPI _TSD data. The _TSD data defines T-state CPU dependencies
* (think CPU domains).
*/
static int
{
int ret;
if (ret == 0)
return (ret);
}
/*
* Cache the ACPI _CSD data. The _CSD data defines C-state CPU dependencies
* (think CPU domains).
*/
static int
{
int ret;
if (ret == 0)
return (ret);
}
static void
{
ACPI_OBJECT *q, *l;
int i, j;
KM_SLEEP);
/*
* Skip duplicate entries.
*/
continue;
for (j = 0; j < CPU_ACPI_PSS_CNT; j++)
pstate++;
cnt--;
}
}
static void
{
ACPI_OBJECT *q, *l;
int i, j;
KM_SLEEP);
/*
* Skip duplicate entries.
*/
continue;
for (j = 0; j < CPU_ACPI_TSS_CNT; j++)
tstate++;
cnt--;
}
}
/*
* Cache the _PSS or _TSS data.
*/
static int
{
int cnt;
int i, j;
/*
* Fetch the state data (if present) for the CPU node.
*/
if (ACPI_FAILURE(astatus)) {
if (astatus == AE_NOT_FOUND) {
return (1);
}
goto out;
}
goto out;
}
/*
* Does the package look coherent?
*/
cnt = 0;
"%s package for CPU %d.",
goto out;
}
for (j = 0; j < fcnt; j++) {
if (q[j].Type != ACPI_TYPE_INTEGER) {
"invalid (type) for CPU %d.",
goto out;
}
}
/*
* Ignore duplicate entries.
*/
continue;
/*
* Some supported state tables are larger than required
* and unused elements are filled with patterns
* of 0xff. Simply check here for frequency = 0xffff
* and stop counting if found.
*/
continue;
}
/*
* We should never find a valid entry after we've hit
* an the end-of-table entry.
*/
if (eot) {
"package after eot for CPU %d.",
goto out;
}
/*
* states must be defined in order from highest to lowest.
*/
"definitions out of order for CPU %d.",
goto out;
}
/*
* This entry passes.
*/
cnt++;
}
if (cnt == 0)
goto out;
/*
* Yes, fill in the structure.
*/
ret = 0;
out:
return (ret);
}
/*
* Cache the _PSS data. The _PSS data defines the different power levels
* supported by the CPU and the attributes associated with each power level
* (i.e., frequency, voltage, etc.). The power levels are number from
* highest to lowest. That is, the highest power level is _PSS entry 0
* and the lowest power level is the last _PSS entry.
*/
static int
{
int ret;
if (ret == 0)
return (ret);
}
/*
* Cache the _TSS data. The _TSS data defines the different freq throttle
* levels supported by the CPU and the attributes associated with each
* throttle level (i.e., frequency throttle percentage, voltage, etc.).
* The throttle levels are number from highest to lowest.
*/
static int
{
int ret;
if (ret == 0)
return (ret);
}
/*
* Cache the ACPI CPU present capabilities data objects.
*/
static int
{
/*
* Fetch the present capabilites object (if present) for the CPU node.
*/
"package for CPU %d.", astatus,
goto out;
}
*pc = 0;
return (1);
}
ret = 0;
out:
return (ret);
}
/*
* Cache the _PPC data. The _PPC simply contains an integer value which
* represents the highest power level that a CPU should transition to.
* That is, it's an index into the array of _PSS entries and will be
* greater than or equal to zero.
*/
void
{
int ret;
if (ret == 0)
}
/*
* Cache the _TPC data. The _TPC simply contains an integer value which
* represents the throttle level that a CPU should transition to.
* That is, it's an index into the array of _TSS entries and will be
* greater than or equal to zero.
*/
void
{
int ret;
if (ret == 0)
}
int
{
if ((addrspaceid != ACPI_ADR_SPACE_FIXED_HARDWARE) &&
(addrspaceid != ACPI_ADR_SPACE_SYSTEM_IO)) {
return (1);
}
return (0);
}
int
{
int i, count;
/*
* Fetch the C-state data (if present) for the CPU node.
*/
if (ACPI_FAILURE(astatus)) {
if (astatus == AE_NOT_FOUND) {
return (1);
}
goto out;
}
goto out;
}
/*
* Does the package look coherent?
*/
"count %d != Package count %d for CPU %d",
goto out;
}
/*
* Reuse the old buffer if the number of C states is the same.
*/
if (CPU_ACPI_CSTATES(handle) &&
}
p = cstate;
if (cpu_acpi_verify_cstate(cstate)) {
/*
* ignore this entry if it's not valid
*/
continue;
}
if (cstate == p) {
cstate++;
/*
* if there are duplicate entries, we keep the
* last one. This fixes:
* 1) some buggy BIOS have total duplicate entries.
* 2) ACPI Spec allows the same cstate entry with
* different power and latency, we use the one
* with more power saving.
*/
} else {
/*
* we got a valid entry, cache it to the
* cstate structure
*/
p = cstate++;
count++;
}
}
if (count < 2) {
goto out;
}
goto out;
}
}
ret = 0;
out:
return (ret);
}
/*
* Cache the _PCT, _PSS, _PSD and _PPC data.
*/
int
{
if (cpu_acpi_cache_pct(handle) < 0) {
int, PCT_OBJ);
return (-1);
}
if (cpu_acpi_cache_pstates(handle) != 0) {
int, PSS_OBJ);
return (-1);
}
if (cpu_acpi_cache_psd(handle) < 0) {
int, PSD_OBJ);
return (-1);
}
return (0);
}
void
{
if (CPU_ACPI_PSTATES(handle)) {
}
}
}
/*
* Cache the _PTC, _TSS, _TSD and _TPC data.
*/
int
{
int ret;
if (cpu_acpi_cache_ptc(handle) < 0) {
int, PTC_OBJ);
return (-1);
}
int, TSS_OBJ);
return (ret);
}
if (cpu_acpi_cache_tsd(handle) < 0) {
int, TSD_OBJ);
return (-1);
}
return (0);
}
void
{
if (CPU_ACPI_TSTATES(handle)) {
}
}
}
/*
* Cache the _CST data.
*/
int
{
int ret;
int, CST_OBJ);
return (ret);
}
if (cpu_acpi_cache_csd(handle) < 0) {
int, CSD_OBJ);
return (-1);
}
return (0);
}
void
{
if (CPU_ACPI_CSTATES(handle)) {
}
}
}
/*
* Register a handler for processor change notifications.
*/
void
{
}
/*
* Remove a handler for processor change notifications.
*/
void
{
}
/*
* Write _PDC.
*/
int
{
int i;
int ret = 0;
for (i = 0; i < count; i++)
*bufptr++ = *capabilities++;
/*
* Fetch the ??? (if present) for the CPU node.
*/
if (ACPI_FAILURE(astatus)) {
if (astatus == AE_NOT_FOUND) {
ret = 1;
} else {
ret = -1;
}
}
return (ret);
}
/*
* Write to system IO port.
*/
int
{
"%lx.", (long)address);
return (-1);
}
return (0);
}
/*
* Read from a system IO port.
*/
int
{
"%lx.", (long)address);
return (-1);
}
return (0);
}
/*
* Return supported frequencies.
*/
{
int *hspeeds;
int i;
for (i = 0; i < nspeeds; i++) {
pstate++;
}
return (nspeeds);
}
/*
* Free resources allocated by cpu_acpi_get_speeds().
*/
void
{
}
{
if (CPU_ACPI_CSTATES(handle))
return (CPU_ACPI_CSTATES_COUNT(handle));
else
return (1);
}
void
{
}
void
{
}
/*
* Map the dip to an ACPI handle for the device.
*/
{
return (NULL);
}
return (handle);
}
/*
* Free any resources.
*/
void
{
if (handle)
}