/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2015 Joyent, Inc.
*/
#include <sys/asm_linkage.h>
#include <sys/asm_misc.h>
#include <sys/privregs.h>
#include <sys/machbrand.h>
#if defined(__lint)
#else /* __lint */
#include <sys/segments.h>
#include <sys/traptrace.h>
#if defined(__xpv)
#include <sys/hypervisor.h>
#endif
#include "assym.h"
#endif /* __lint */
/*
* We implement five flavours of system call entry points
*
*
* kernel entry method. Older libc implementations and legacy binaries may use
* the lcall call gate, so it must continue to be supported.
*
* System calls that use an lcall call gate are processed in trap() via a
* segment-not-present trap, i.e. lcalls are extremely slow(!).
*
* The basic pattern used in the 32-bit SYSC handler at this point in time is
* to have the bare minimum of assembler, and get to the C handlers as
* quickly as possible.
*
* The 64-bit handler is much closer to the sparcv9 handler; that's
* because of passing arguments in registers. The 32-bit world still
* passes arguments on the stack -- that makes that handler substantially
* more complex.
*
* The two handlers share a few code fragments which are broken
* out into preprocessor macros below.
*
* XX64 come back and speed all this up later. The 32-bit stuff looks
* especially easy to speed up the argument copying part ..
*
*
* Notes about segment register usage (c.f. the 32-bit kernel)
*
* In the 32-bit kernel, segment registers are dutifully saved and
* restored on all mode transitions because the kernel uses them directly.
* When the processor is running in 64-bit mode, segment registers are
* largely ignored.
*
* %cs and %ss
* controlled by the hardware mechanisms that make mode transitions
*
* The remaining segment registers have to either be pointing at a valid
* descriptor i.e. with the 'present' bit set, or they can NULL descriptors
*
* %ds and %es
* always ignored
*
* %fs and %gs
* fsbase and gsbase are used to control the place they really point at.
* The kernel only depends on %gs, and controls its own gsbase via swapgs
*
* Note that loading segment registers is still costly because the GDT
* lookup still happens (this is because the hardware can't know that we're
* not setting up these segment registers for a 32-bit program). Thus we
* avoid doing this in the syscall path, and defer them to lwp context switch
* handlers, so the register values remain virtualized to the lwp.
*/
#if defined(SYSCALLTRACE)
#else
#endif
/*
* In the 32-bit kernel, we do absolutely nothing before getting into the
* brand callback checks. In 64-bit land, we do swapgs and then come here.
* We assume that the %rsp- and %r15-stashing fields in the CPU structure
* are still unused.
*
* Check if a brand_mach_ops callback is defined for the specified callback_id
* type. If so invoke it with the kernel's %gs value loaded and the following
* data on the stack:
*
* stack: --------------------------------------
* 32 | callback pointer |
* | 24 | user (or interrupt) stack pointer |
* | 16 | lwp pointer |
* v 8 | userland return address |
* 0 | callback wrapper return addr |
* --------------------------------------
*
* Since we're pushing the userland return address onto the kernel stack
* we need to get that address without accessing the user's stack (since we
* can't trust that data). There are different ways to get the userland
* return address depending on how the syscall trap was made:
*
* a) For sys_syscall and sys_syscall32 the return address is in %rcx.
* b) For sys_sysenter the return address is in %rdx.
* c) For sys_int80 and sys_syscall_int (int91), upon entry into the macro,
* the stack pointer points at the state saved when we took the interrupt:
* ------------------------
* | | user's %ss |
* | | user's %esp |
* | | EFLAGS register |
* v | user's %cs |
* | user's %eip |
* ------------------------
*
* The 2nd parameter to the BRAND_CALLBACK macro is either the
* BRAND_URET_FROM_REG or BRAND_URET_FROM_INTR_STACK macro. These macros are
* used to generate the proper code to get the userland return address for
* each syscall entry point.
*
* The interface to the brand callbacks on the 64-bit kernel assumes %r15
* is available as a scratch register within the callback. If the callback
* returns within the kernel then this macro will restore %r15. If the
* callback is going to return directly to userland then it should restore
* %r15 before returning to userland.
*/
/*
* The interrupt stack pointer we saved on entry to the BRAND_CALLBACK macro
* is currently pointing at the user return address (%eip).
*/
#define BRAND_URET_FROM_INTR_STACK() \
je 1f ;\
push_userland_ret /* push the return address */ ;\
/*
* Check to see if a simple (direct) return is possible i.e.
*
* if (t->t_post_sys_ast | syscalltrace |
* lwp->lwp_pcb.pcb_rupdate == 1)
* do full version ;
*
* Preconditions:
* - t is curthread
* Postconditions:
* - condition code NE is set if post-sys is too complex
* - rtmp is zeroed if it isn't (we rely on this!)
* - ltmp is smashed
*/
ORL_SYSCALLTRACE(rtmp); \
/*
* Fix up the lwp, thread, and eflags for a successful return
*
* Preconditions:
* - zwreg contains zero
*/
/*
* ASSERT(lwptoregs(lwp) == rp);
*
* This may seem obvious, but very odd things happen if this
* assertion is false
*
* Preconditions:
* (%rsp is ready for normal call sequence)
* Postconditions (if assertion is true):
* %r11 is smashed
*
* ASSERT(rp->r_cs == descnum)
*
* The code selector is written into the regs structure when the
* lwp stack is created. We use this ASSERT to validate that
* the regs structure really matches how we came in.
*
* Preconditions:
* (%rsp is ready for normal call sequence)
* Postconditions (if assertion is true):
* -none-
*
* ASSERT(lwp->lwp_pcb.pcb_rupdate == 0);
*
* If this is false, it meant that we returned to userland without
* updating the segment registers as we were supposed to.
*
* Note that we must ensure no interrupts or other traps intervene
* between entering privileged mode and performing the assertion,
* otherwise we may perform a context switch on the thread, which
* will end up setting pcb_rupdate to 1 again.
*/
#if defined(DEBUG)
#if !defined(__lint)
.string "syscall_asm_amd64.s:%d lwptoregs(%p) [%p] != rp [%p]"
.string "syscall_asm_amd64.s:%d rp->r_cs [%ld] != %ld"
.string "syscall_asm_amd64.s:%d lwp %p, pcb_rupdate != 0"
#endif /* !__lint */
je 7f; \
7:
je 8f; \
8:
#else
#endif
/*
* Do the traptrace thing and restore any registers we used
* in situ. Assumes that %rsp is pointing at the base of
* the struct regs, obviously ..
*/
#ifdef TRAPTRACE
/* paranoia: clean the top 32-bits of the registers */ \
#else /* TRAPTRACE */
#endif /* TRAPTRACE */
/*
* The 64-bit libc syscall wrapper does this:
*
* fn(<args>)
* {
* movq %rcx, %r10 -- because syscall smashes %rcx
* movl $CODE, %eax
* syscall
* <error processing>
* }
*
* Thus when we come into the kernel:
*
* %rdi, %rsi, %rdx, %r10, %r8, %r9 contain first six args
* %rax is the syscall number
* %r12-%r15 contain caller state
*
* The syscall instruction arranges that:
*
* %rcx contains the return %rip
* %r11d contains bottom 32-bits of %rflags
* %rflags is masked (as determined by the SFMASK msr)
* %cs is set to UCS_SEL (as determined by the STAR msr)
* %ss is set to UDS_SEL (as determined by the STAR msr)
* %rip is set to sys_syscall (as determined by the LSTAR msr)
*
* Or in other words, we have no registers available at all.
* Only swapgs can save us!
*
* Under the hypervisor, the swapgs has happened already. However, the
* state of the world is very different from that we're familiar with.
*
* In particular, we have a stack structure like that for interrupt
* gates, except that the %cs and %ss registers are modified for reasons
* that are not entirely clear. Critically, the %rcx/%r11 values do
* *not* reflect the usage of those registers under a 'real' syscall[1];
* the stack, therefore, looks like this:
*
* 0x0(rsp) potentially junk %rcx
* 0x8(rsp) potentially junk %r11
* 0x10(rsp) user %rip
* 0x18(rsp) modified %cs
* 0x20(rsp) user %rflags
* 0x28(rsp) user %rsp
* 0x30(rsp) modified %ss
*
*
* and before continuing on, we must load the %rip into %rcx and the
* %rflags into %r11.
*
* [1] They used to, and we relied on it, but this was broken in 3.1.1.
* Sigh.
*/
#if defined(__xpv)
#define XPV_SYSCALL_PROD \
#else
#endif
#if defined(__lint)
/*ARGSUSED*/
void
{}
void
{}
#else /* __lint */
SWAPGS /* kernel gsbase */
SWAPGS /* kernel gsbase */
/*
* Copy these registers here in case we end up stopped with
* someone (like, say, /proc) messing with our register state.
* We don't -restore- them unless we have to in update_sregs.
*
* Since userland -can't- change fsbase or gsbase directly,
* and capturing them involves two serializing instructions,
* we don't bother to capture them here.
*/
/*
* Machine state saved in the regs structure on the stack
* First six args in %rdi, %rsi, %rdx, %rcx, %r8, %r9
* %eax is the syscall number
* %rsp is the thread's stack, %r15 is curthread
* REG_RSP(%rsp) is the user's stack
*/
/*
* If the handler returns two ints, then we need to split the
* 64-bit return value into two 32-bit values.
*/
je 5f
5:
/*
* Optimistically assume that there's no post-syscall
* work to do. (This is to avoid having to call syscall_mstate()
* with interrupts disabled)
*/
/*
* We must protect ourselves from being descheduled here;
* If we were, and we ended up on another cpu, or another
* lwp got in ahead of us, it could change the segment
* registers without us noticing before we return to userland.
*/
/*
* We need to protect ourselves against non-canonical return values
* because Intel doesn't check for them on sysret (AMD does). Canonical
* addresses on current amd64 processors only use 48-bits for VAs; an
* address is canonical if all upper bits (47-63) are identical. If we
* find a non-canonical %rip, we opt to go through the full
* _syscall_post path which takes us into an iretq which is not
* susceptible to the same problems sysret is.
*
* We're checking for a canonical address by first doing an arithmetic
* shift. This will fill in the remaining bits with the value of bit 63.
* If the address were canonical, the register would now have either all
* zeroes or all ones in it. Therefore we add one (inducing overflow)
* and compare against 1. A canonical address will either be zero or one
* at this point, hence the use of ja.
*
* At this point, r12 and r13 have the return value so we can't use
* those registers.
*/
/*
* To get back to userland, we need the return %rip in %rcx and
* the return %rfl in %r11d. The sysretq instruction also arranges
* to fix up %cs and %ss; everything else is our responsibility.
*/
/* %rcx used to restore %rip value */
/* %r11 used to restore %rfl value */
#if defined(__xpv)
#else
#endif
/*
* There can be no instructions between the ALTENTRY below and
* SYSRET or we could end up breaking brand support. See label usage
* in sn1_brand_syscall_callback for an example.
*/
#if defined(__xpv)
/*
* We can only get here after executing a brand syscall
* interposition callback handler and simply need to
* "sysretq" back to userland. On the hypervisor this
* involves the iret hypercall which requires us to construct
* just enough of the stack needed for the hypercall.
* (rip, cs, rflags, rsp, ss).
*/
/*
* XXPV: see comment in SYSRETQ definition for future optimization
* we could take.
*/
#else
SWAPGS /* user gsbase */
#endif
/*NOTREACHED*/
/*
* Didn't abort, so reload the syscall args and invoke the handler.
*/
/*
* Sigh, our optimism wasn't justified, put it back to LMS_SYSTEM
* so that we can account for the extra work it takes us to finish.
*/
#endif /* __lint */
#if defined(__lint)
/*ARGSUSED*/
void
{}
#else /* __lint */
SWAPGS /* kernel gsbase */
SWAPGS /* kernel gsbase */
/*
* Copy these registers here in case we end up stopped with
* someone (like, say, /proc) messing with our register state.
* We don't -restore- them unless we have to in update_sregs.
*
* Since userland -can't- change fsbase or gsbase directly,
* we don't bother to capture them here.
*/
/*
* Application state saved in the regs structure on the stack
* %eax is the syscall number
* %rsp is the thread's stack, %r15 is curthread
* REG_RSP(%rsp) is the user's stack
*/
/*
* Make some space for MAXSYSARGS (currently 8) 32-bit args placed
* into 64-bit (long) arg slots, maintaining 16 byte alignment. Or
* more succinctly:
*
* SA(MAXSYSARGS * sizeof (long)) == 64
*/
/*
* Fetch the arguments copied onto the kernel stack and put
* them in the right registers to invoke a C-style syscall handler.
* %rax contains the handler address.
*
* Ideas for making all this go faster of course include simply
* forcibly fetching 6 arguments from the user stack under lofault
* protection, reverting to copyin_args only when watchpoints
* are in effect.
*
* (If we do this, make sure that exec and libthread leave
* enough space at the top of the stack to ensure that we'll
* never do a fetch from an invalid page.)
*
* Lots of ideas here, but they won't really help with bringup B-)
* Correctness can't wait, performance can wait a little longer ..
*/
/*
* amd64 syscall handlers -always- return a 64-bit value in %rax.
* On the 32-bit kernel, they always return that value in %eax:%edx
* as required by the 32-bit ABI.
*
* Simulate the same behaviour by unconditionally splitting the
* return value in the same way.
*/
/*
* Optimistically assume that there's no post-syscall
* work to do. (This is to avoid having to call syscall_mstate()
* with interrupts disabled)
*/
/*
* We must protect ourselves from being descheduled here;
* If we were, and we ended up on another cpu, or another
* lwp got in ahead of us, it could change the segment
* registers without us noticing before we return to userland.
*/
/*
* To get back to userland, we need to put the return %rip in %rcx and
* the return %rfl in %r11d. The sysret instruction also arranges
* to fix up %cs and %ss; everything else is our responsibility.
*/
/* %ecx used for return pointer */
SWAPGS /* user gsbase */
/*NOTREACHED*/
/*
* Sigh, our optimism wasn't justified, put it back to LMS_SYSTEM
* so that we can account for the extra work it takes us to finish.
*/
#endif /* __lint */
/*
* System call handler via the sysenter instruction
* Used only for 32-bit system calls on the 64-bit kernel.
*
* The caller in userland has arranged that:
*
* - %eax contains the syscall number
* - %ecx contains the user %esp
* - %edx contains the return %eip
* - the user stack contains the args to the syscall
*
* Hardware and (privileged) initialization code have arranged that by
* the time the sysenter instructions completes:
*
* - %rip is pointing to sys_sysenter (below).
* - %cs and %ss are set to kernel text and stack (data) selectors.
* - %rsp is pointing at the lwp's stack
* - interrupts have been disabled.
*
* Note that we are unable to return both "rvals" to userland with
* this call, as %edx is used by the sysexit instruction.
*
* One final complication in this routine is its interaction with
* single-stepping in a debugger. For most of the system call mechanisms,
* the CPU automatically clears the single-step flag before we enter the
* kernel. The sysenter mechanism does not clear the flag, so a user
* single-stepping through the kernel. To detect this, kmdb compares the
* trap %pc to the [brand_]sys_enter addresses on each single-step trap.
* If it finds that we have single-stepped to a sysenter entry point, it
* explicitly clears the flag and executes the sys_sysenter routine.
*
* One final complication in this final complication is the fact that we
* have two different entry points for sysenter: brand_sys_sysenter and
* sys_sysenter. If we enter at brand_sys_sysenter and start single-stepping
* through the kernel with kmdb, we will eventually hit the instruction at
* sys_sysenter. kmdb cannot distinguish between that valid single-step
* and the undesirable one mentioned above. To avoid this situation, we
* simply add a jump over the instruction at sys_sysenter to make it
* impossible to single-step to it.
*/
#if defined(__lint)
void
{}
#else /* __lint */
SWAPGS /* kernel gsbase */
/*
* Jump over sys_sysenter to allow single-stepping as described
* above.
*/
SWAPGS /* kernel gsbase */
/*
* Set the interrupt flag before storing the flags to the
* flags image on the stack so we can return to user with
* interrupts enabled if we return via sys_rtt_syscall32
*/
/*
* Copy these registers here in case we end up stopped with
* someone (like, say, /proc) messing with our register state.
* We don't -restore- them unless we have to in update_sregs.
*
* Since userland -can't- change fsbase or gsbase directly,
* we don't bother to capture them here.
*/
/*
* Application state saved in the regs structure on the stack
* %eax is the syscall number
* %rsp is the thread's stack, %r15 is curthread
* REG_RSP(%rsp) is the user's stack
*/
/*
* Catch 64-bit process trying to issue sysenter instruction
* on Nocona based systems.
*/
je 7f
/*
* For a non-32-bit process, simulate a #ud, since that's what
* native hardware does. The traptrace entry (above) will
* let you know what really happened.
*/
7:
/*
* Make some space for MAXSYSARGS (currently 8) 32-bit args
* placed into 64-bit (long) arg slots, plus one 64-bit
* (long) arg count, maintaining 16 byte alignment.
*/
/*
* Fetch the arguments copied onto the kernel stack and put
* them in the right registers to invoke a C-style syscall handler.
* %rax contains the handler address.
*/
/*
* amd64 syscall handlers -always- return a 64-bit value in %rax.
* On the 32-bit kernel, the always return that value in %eax:%edx
* as required by the 32-bit ABI.
*
* Simulate the same behaviour by unconditionally splitting the
* return value in the same way.
*/
/*
* Optimistically assume that there's no post-syscall
* work to do. (This is to avoid having to call syscall_mstate()
* with interrupts disabled)
*/
/*
* We must protect ourselves from being descheduled here;
* If we were, and we ended up on another cpu, or another
* lwp got int ahead of us, it could change the segment
* registers without us noticing before we return to userland.
*/
/*
* To get back to userland, load up the 32-bit registers and
* sysexit back where we came from.
*/
/*
* Interrupts will be turned on by the 'sti' executed just before
* sysexit. The following ensures that restoring the user's rflags
* doesn't enable interrupts too soon.
*/
/*
* (There's no point in loading up %edx because the sysexit
* mechanism smashes it.)
*/
#endif /* __lint */
/*
* This is the destination of the "int $T_SYSCALLINT" interrupt gate, used by
* the generic i386 libc to do system calls. We do a small amount of setup
* before jumping into the existing sys_syscall32 path.
*/
#if defined(__lint)
/*ARGSUSED*/
void
{}
#else /* __lint */
SWAPGS /* kernel gsbase */
SWAPGS /* kernel gsbase */
/*
* Set t_post_sys on this thread to force ourselves out via the slow
* path. It might be possible at some later date to optimize this out
* and use a faster return mechanism.
*/
/*
* or we could end up breaking branded zone support. See the usage of
* this label in lx_brand_int80_callback and sn1_brand_int91_callback
* for examples.
*/
SWAPGS /* user gsbase */
/*NOTREACHED*/
#endif /* __lint */
/*
* Legacy 32-bit applications and old libc implementations do lcalls;
* we should never get here because the LDT entry containing the syscall
* segment descriptor has the "segment present" bit cleared, which means
* we end up processing those system calls in trap() via a not-present trap.
*
* We do it this way because a call gate unhelpfully does -nothing- to the
* interrupt flag bit, so an interrupt can run us just after the lcall
* completes, but just before the swapgs takes effect. Thus the INTR_PUSH and
* INTR_POP paths would have to be slightly more complex to dance around
* this problem, and end up depending explicitly on the first
* instruction of this handler being either swapgs or cli.
*/
#if defined(__lint)
/*ARGSUSED*/
void
{}
#else /* __lint */
SWAPGS /* kernel gsbase */
pushq $0
.string "sys_lcall32: shouldn't be here!"
/*
* Declare a uintptr_t which covers the entire pc range of syscall
* handlers for the stack walkers that need this.
*/
.NWORD . - _allsyscalls
#endif /* __lint */
/*
*/
#if defined(__lint)
/*ARGSUSED*/
void
{}
/*ARGSUSED*/
void
sep_restore(void *ksp)
{}
#else /* __lint */
/*
* setting this value to zero as we switch away causes the
* stack-pointer-on-sysenter to be NULL, ensuring that we
* don't silently corrupt another (preempted) thread stack
* when running an lwp that (somehow) didn't get sep_restore'd
*/
/*
* Update the kernel stack pointer as we resume onto this cpu.
*/
#endif /* __lint */