/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
*/
#ifndef _AMD_IOMMU_IMPL_H
#define _AMD_IOMMU_IMPL_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef _KERNEL
/* Capability Register offsets */
/* ControL Registers offsets */
/* Capability Header Register Bits */
/* Capability Range Register bits */
/* Capability Misc Register bits */
/* Device Table Base Address register bits */
/* Command Buffer Base Address register bits */
/* Event Log Base Address register bits */
/* Control register bits */
/* Exclusion Base Register bits */
/* Exclusion Limit Register bits */
/* Command Buffer Head Pointer Register bits */
/* Command Buffer Tail Pointer Register bits */
/* Event Log Head Pointer Register bits */
/* Event Log Tail Pointer Register bits */
/* Status Register bits */
/* Device Table Bits */
/* size in bytes of each device table entry */
/* Interrupt Remapping related Device Table bits */
/* DMA Remapping related Device Table Bits */
/*
* IOMMU Command bits
*/
typedef enum {
AMD_IOMMU_CMD_INVAL = 0,
typedef enum {
/* Common command bits */
/* Completion Wait command bits */
/* Invalidate Device Table entry command bits */
/* Invalidate IOMMU Pages command bits */
/* Invalidate IOTLB command bits */
/* Invalidate Interrupt Table bits */
#if defined(__amd64)
#else
#endif
/*
* DMA sync macros
* TODO: optimize sync only small ranges
*/
typedef union split {
} split_t;
((*(rp)) = \
| ((uint64_t)(v) << BITPOS_END(b))))
(void) ((amd_iommu_64bit_bug) ? \
amd_iommu_reg_set64_workaround(rp, b, v) : \
AMD_IOMMU_REG_SET64_IMPL(rp, b, v))
((*(rp)) = \
| ((uint32_t)(v) << BITPOS_END(b))))
((*(rp)) = \
| ((uint16_t)(v) << BITPOS_END(b))))
((*(rp)) = \
| ((uint8_t)(v) << BITPOS_END(b))))
/*
* Cast a 64 bit pointer to a uint64_t *
*/
typedef enum {
typedef struct amd_iommu {
int aiomt_idx;
void *aiomt_dma_bufva;
} amd_iommu_t;
typedef struct amd_iommu_dma_devtbl_ent {
typedef struct amd_iommu_alias {
typedef struct amd_iommu_cmdargs {
struct amd_iommu_page_table;
typedef struct amd_iommu_page_table_hash {
typedef enum {
typedef enum {
AMD_IOMMU_DEBUG_NONE = 0,
extern const char *amd_iommu_modname;
extern kmutex_t amd_iommu_global_lock;
extern amd_iommu_alias_t **amd_iommu_alias;
extern amd_iommu_debug_t amd_iommu_debug;
extern uint8_t amd_iommu_htatsresv;
extern uint8_t amd_iommu_vasize;
extern uint8_t amd_iommu_pasize;
extern int amd_iommu_64bit_bug;
extern int amd_iommu_unity_map;
extern int amd_iommu_no_RW_perms;
extern int amd_iommu_no_unmap;
extern int amd_iommu_pageva_inval_all;
extern int amd_iommu_disable;
extern char *amd_iommu_disable_list;
void amd_iommu_read_boot_props(void);
#endif /* _KERNEL */
#ifdef __cplusplus
}
#endif
#endif /* _AMD_IOMMU_IMPL_H */