/******************************************************************************
*
* Guest OS interface to x86 64-bit Xen.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Copyright (c) 2004-2006, K A Fraser
*/
/*
* Hypercall interface:
* Input: %rdi, %rsi, %rdx, %r10, %r8 (arguments 1-5)
* Output: %rax
* Access is via hypercall page (set up by guest loader or via a Xen MSR):
* call hypercall_page + hypercall-number * 32
* Clobbered: argument registers (e.g., 2-arg hypercall clobbers %rdi,%rsi)
*/
/*
* Direct hypercall interface:
* As above, except the entry sequence to the hypervisor is:
* mov $hypercall-number*32,%eax ; syscall
* Clobbered: %rcx, %r11, argument registers (as above)
*/
#if !defined(_ASM)
#else
#endif
/*
* 64-bit segment selectors
* These flat segments are in the Xen-private section of every GDT. Since these
* are also present in the initial GDT, many OSes will be able to avoid
* installing their own GDT.
*/
#ifndef HYPERVISOR_VIRT_START
#endif
#ifndef machine_to_phys_mapping
#endif
/*
* int HYPERVISOR_set_segment_base(unsigned int which, unsigned long base)
* @which == SEGBASE_* ; @base == 64-bit base address
* Returns 0 on success.
*/
#define SEGBASE_FS 0
/*
* int HYPERVISOR_iret(void)
* All arguments are on the kernel stack, in the following format.
* Never returns if successful. Current kernel context is lost.
* The saved CS is mapped as follows:
* RING0 -> RING3 kernel mode.
* RING1 -> RING3 kernel mode.
* RING2 -> RING3 kernel mode.
* RING3 -> RING3 user mode.
* However RING0 indicates that the guest kernel should return to iteself
* directly with
* orb $3,1*8(%rsp)
* iretq
* If flags contains VGCF_in_syscall:
* Restore RAX, RIP, RFLAGS, RSP.
* Discard R11, RCX, CS, SS.
* Otherwise:
* Restore RAX, R11, RCX, CS:RIP, RFLAGS, SS:RSP.
* All other registers are saved on hypercall entry and restored to user.
*/
/* Guest exited in SYSCALL context? Return to guest with SYSRET? */
#ifndef __ASSEMBLY__
struct iret_context {
/* Top of stack (%rsp at point of hypercall). */
/* Bottom of iret stack frame. */
};
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
}
#else
/* Non-gcc sources must always use the proper 64-bit name (e.g., rax). */
#endif
struct cpu_user_regs {
__DECL_REG(bp);
__DECL_REG(bx);
__DECL_REG(ax);
__DECL_REG(cx);
__DECL_REG(dx);
__DECL_REG(si);
__DECL_REG(di);
__DECL_REG(ip);
__DECL_REG(sp);
};
struct arch_vcpu_info {
unsigned long cr2;
};
typedef unsigned long xen_callback_t;
/*
* Structure used to capture the register state at panic time. This struct
* is built to mimic a similar structure in Solaris. If there is interest
* in making this panic implementation an official part of Xen, this should
* be made more platform-neutral.
*/
struct panic_regs {
unsigned long pad1;
unsigned long pad2;
unsigned long rdi;
unsigned long rsi;
unsigned long rdx;
unsigned long rcx;
unsigned long r8;
unsigned long r9;
unsigned long rax;
unsigned long rbx;
unsigned long rbp;
unsigned long r10;
unsigned long r11;
unsigned long r12;
unsigned long r13;
unsigned long r14;
unsigned long r15;
unsigned long pad3;
unsigned long pad4;
unsigned long ds;
unsigned long es;
unsigned long fs;
unsigned long gs;
unsigned long pad5;
unsigned long pad6;
unsigned long rip;
unsigned long cs;
unsigned long rfl;
unsigned long rsp;
unsigned long ss;
};
#endif /* !__ASSEMBLY__ */
/* Offsets of each field in the xen_panic_regs structure. */
#define PANIC_REG_PAD1 0
#endif /* __XEN_PUBLIC_ARCH_X86_XEN_X86_64_H__ */
/*
* Local variables:
* mode: C
* c-set-style: "BSD"
* c-basic-offset: 4
* tab-width: 4
* indent-tabs-mode: nil
* End:
*/