/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* Copyright (c) 2006 by Damien Bergamini <damien.bergamini@free.fr>
* Copyright (c) 2006 by Florian Stoehr <ich@florian-stoehr.de>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
/*
*/
#ifndef _ZYD_REG_H
#define _ZYD_REG_H
#ifdef __cplusplus
extern "C"
{
#endif
/*
* MAC registers.
*/
/*
* Miscellanous registers.
*/
/*
* EEPROM registers.
*/
/*
* Firmware registers offsets (relative to fwbase).
*/
/* possible flags for register ZYD_FW_LINK_STATUS */
/*
* RF IDs.
*/
/*
* PHY registers (8 bits, not documented).
*/
/* copied nearly verbatim from the Linux driver rewrite */
#define ZYD_DEF_PHY \
{ \
{ 0, 0 } \
}
#define ZYD_DEF_PHYB \
{ \
{ 0, 0 } \
}
#define ZYD_RFMD_PHY \
{ \
}
#define ZYD_RFMD_RF \
{ \
0x000007, 0x07dd43, 0x080959, 0x0e6666, 0x116a57, 0x17dd43, \
0x1819f9, 0x1e6666, 0x214554, 0x25e7fa, 0x27fffa, 0x294128, \
0x2c0000, 0x300000, 0x340000, 0x381e0f, 0x6c180f \
}
#define ZYD_RFMD_CHANTABLE \
{ \
{ 0x181979, 0x1e6666 }, \
{ 0x181989, 0x1e6666 }, \
{ 0x181999, 0x1e6666 }, \
{ 0x1819a9, 0x1e6666 }, \
{ 0x1819b9, 0x1e6666 }, \
{ 0x1819c9, 0x1e6666 }, \
{ 0x1819d9, 0x1e6666 }, \
{ 0x1819e9, 0x1e6666 }, \
{ 0x1819f9, 0x1e6666 }, \
{ 0x181a09, 0x1e6666 }, \
{ 0x181a19, 0x1e6666 }, \
{ 0x181a29, 0x1e6666 }, \
{ 0x181a39, 0x1e6666 }, \
{ 0x181a60, 0x1c0000 } \
}
#define ZYD_AL2230_PHY \
{ \
}
#define ZYD_AL2230_PHY_B \
{ \
}
#define ZYD_AL2230_RF \
{ \
0x03f790, 0x033331, 0x00000d, 0x0b3331, 0x03b812, 0x00fff3, \
0x000da4, 0x0f4dc5, 0x0805b6, 0x011687, 0x000688, 0x0403b9, \
0x00dbba, 0x00099b, 0x0bdffc, 0x00000d, 0x00500f, 0x00d00f, \
0x004c0f, 0x00540f, 0x00700f, 0x00500f \
}
#define ZYD_AL2230_RF_B \
{ \
0x03f790, 0x033331, 0x00000d, 0x0b3331, 0x03b812, 0x00fff3, \
0x0005a4, 0x0f4dc5, 0x0805b6, 0x0146c7, 0x000688, 0x0403b9, \
0x00dbba, 0x00099b, 0x0bdffc, 0x00000d, 0x00580f \
}
#define ZYD_AL2230_CHANTABLE \
{ \
{ 0x03f790, 0x033331, 0x00000d }, \
{ 0x03f790, 0x0b3331, 0x00000d }, \
{ 0x03e790, 0x033331, 0x00000d }, \
{ 0x03e790, 0x0b3331, 0x00000d }, \
{ 0x03f7a0, 0x033331, 0x00000d }, \
{ 0x03f7a0, 0x0b3331, 0x00000d }, \
{ 0x03e7a0, 0x033331, 0x00000d }, \
{ 0x03e7a0, 0x0b3331, 0x00000d }, \
{ 0x03f7b0, 0x033331, 0x00000d }, \
{ 0x03f7b0, 0x0b3331, 0x00000d }, \
{ 0x03e7b0, 0x033331, 0x00000d }, \
{ 0x03e7b0, 0x0b3331, 0x00000d }, \
{ 0x03f7c0, 0x033331, 0x00000d }, \
{ 0x03e7c0, 0x066661, 0x00000d } \
}
#define ZYD_AL7230B_PHY_1 \
{ \
{ ZYD_CR251, 0x2f } \
}
#define ZYD_AL7230B_PHY_2 \
{ \
}
#define ZYD_AL7230B_PHY_3 \
{ \
}
#define ZYD_AL7230B_RF_1 \
{ \
0x09ec04, 0x8cccc8, 0x4ff821, 0xc5fbfc, 0x21ebfe, 0xafd401, \
0x6cf56a, 0xe04073, 0x193d76, 0x9dd844, 0x500007, 0xd8c010, \
0x3c9000, 0xbfffff, 0x700000, 0xf15d58 \
}
#define ZYD_AL7230B_RF_2 \
{ \
0xf15d59, 0xf15d5c, 0xf15d58 \
}
#define ZYD_AL7230B_RF_SETCHANNEL \
{ \
0x4ff821, 0xc5fbfc, 0x21ebfe, 0xafd401, 0x6cf56a, 0xe04073, \
0x193d76, 0x9dd844, 0x500007, 0xd8c010, 0x3c9000, 0xf15d58 \
}
#define ZYD_AL7230B_CHANTABLE \
{ \
{ 0x09ec00, 0x8cccc8 }, \
{ 0x09ec00, 0x8cccd8 }, \
{ 0x09ec00, 0x8cccc0 }, \
{ 0x09ec00, 0x8cccd0 }, \
{ 0x05ec00, 0x8cccc8 }, \
{ 0x05ec00, 0x8cccd8 }, \
{ 0x05ec00, 0x8cccc0 }, \
{ 0x05ec00, 0x8cccd0 }, \
{ 0x0dec00, 0x8cccc8 }, \
{ 0x0dec00, 0x8cccd8 }, \
{ 0x0dec00, 0x8cccc0 }, \
{ 0x0dec00, 0x8cccd0 }, \
{ 0x03ec00, 0x8cccc8 }, \
{ 0x03ec00, 0x866660 } \
}
#define ZYD_AL2210_PHY \
{ \
{ ZYD_CR127, 0x03 } \
}
#define ZYD_AL2210_RF \
{ \
0x2396c0, 0x00fcb1, 0x358132, 0x0108b3, 0xc77804, 0x456415, \
0xff2226, 0x806667, 0x7860f8, 0xbb01c9, 0x00000a, 0x00000b \
}
#define ZYD_AL2210_CHANTABLE \
{ \
0x0196c0, 0x019710, 0x019760, 0x0197b0, 0x019800, 0x019850, \
0x0198a0, 0x0198f0, 0x019940, 0x019990, 0x0199e0, 0x019a30, \
0x019a80, 0x019b40 \
}
#define ZYD_GCT_PHY \
{ \
}
#define ZYD_GCT_RF \
{ \
0x1f0000, 0x1f0000, 0x1f0200, 0x1f0600, 0x1f8600, 0x1f8600, \
0x002050, 0x1f8000, 0x1f8200, 0x1f8600, 0x1c0000, 0x10c458, \
0x088e92, 0x187b82, 0x0401b4, 0x140816, 0x0c7000, 0x1c0000, \
0x02ccae, 0x128023, 0x0a0000, 0x1a0000, 0x06e380, 0x16cb94, \
0x0e1740, 0x014980, 0x116240, 0x090000, 0x192304, 0x05112f, \
0x0d54a8, 0x0f8000, 0x1c0008, 0x1c0000, 0x1a0000, 0x1c0008, \
0x150000, 0x0c7000, 0x150800, 0x150000 \
}
#define ZYD_GCT_CHANTABLE \
{ \
0x1a0000, 0x1a8000, 0x1a4000, 0x1ac000, 0x1a2000, 0x1aa000, \
0x1a6000, 0x1ae000, 0x1a1000, 0x1a9000, 0x1a5000, 0x1ad000, \
0x1a3000, 0x1ab000 \
}
#define ZYD_MAXIM_PHY \
{ \
{ ZYD_CR150, 0x0d } \
}
#define ZYD_MAXIM_RF \
{ \
0x00ccd4, 0x030a03, 0x000400, 0x000ca1, 0x010072, 0x018645, \
0x004006, 0x0000a7, 0x008258, 0x003fc9, 0x00040a, 0x00000b, \
0x00026c \
}
#define ZYD_MAXIM_CHANTABLE \
{ \
{ 0x0ccd4, 0x30a03 }, \
{ 0x22224, 0x00a13 }, \
{ 0x37774, 0x10a13 }, \
{ 0x0ccd4, 0x30a13 }, \
{ 0x22224, 0x00a23 }, \
{ 0x37774, 0x10a23 }, \
{ 0x0ccd4, 0x30a23 }, \
{ 0x22224, 0x00a33 }, \
{ 0x37774, 0x10a33 }, \
{ 0x0ccd4, 0x30a33 }, \
{ 0x22224, 0x00a43 }, \
{ 0x37774, 0x10a43 }, \
{ 0x0ccd4, 0x30a43 }, \
{ 0x199a4, 0x20a53 } \
}
#define ZYD_MAXIM2_PHY \
{ \
}
#define ZYD_MAXIM2_RF \
{ \
0x33334, 0x10a03, 0x00400, 0x00ca1, 0x10072, 0x18645, 0x04006, \
0x000a7, 0x08258, 0x03fc9, 0x0040a, 0x0000b, 0x0026c \
}
#define ZYD_MAXIM2_CHANTABLE_F \
{ \
0x33334, 0x08884, 0x1ddd4, 0x33334, 0x08884, 0x1ddd4, 0x33334, \
0x08884, 0x1ddd4, 0x33334, 0x08884, 0x1ddd4, 0x33334, 0x26664 \
}
#define ZYD_MAXIM2_CHANTABLE \
{ \
{ 0x33334, 0x10a03 }, \
{ 0x08884, 0x20a13 }, \
{ 0x1ddd4, 0x30a13 }, \
{ 0x33334, 0x10a13 }, \
{ 0x08884, 0x20a23 }, \
{ 0x1ddd4, 0x30a23 }, \
{ 0x33334, 0x10a23 }, \
{ 0x08884, 0x20a33 }, \
{ 0x1ddd4, 0x30a33 }, \
{ 0x33334, 0x10a33 }, \
{ 0x08884, 0x20a43 }, \
{ 0x1ddd4, 0x30a43 }, \
{ 0x33334, 0x10a43 }, \
{ 0x26664, 0x20a53 } \
}
/*
* Control pipe requests.
*/
/* possible values for register ZYD_CR_INTERRUPT */
/* possible values for register ZYD_MAC_MISC */
/* possible values for register ZYD_MAC_ENCRYPTION_TYPE */
/* flags for register ZYD_MAC_RXFILTER */
/* helpers for register ZYD_MAC_RXFILTER */
#define ZYD_FILTER_BSS \
#define ZYD_FILTER_HOSTAP \
/*
* RF configuration defs
*/
/* FIXME: this should be 1 for the 3683-A rf chip */
/*
* Control registers use byte-addressing, other registers
* use word adressing. FIXME: Do this properly.
*/
#define ZYD_REG32_LO(x) (x)
#define ZYD_MIN_FRAGSZ \
(sizeof (struct zyd_plcphdr) + IEEE80211_MIN_LEN + \
sizeof (struct zyd_rx_stat))
#define ZYD_RX_CIPHER_WEP \
/*
* USB cmd_out pipe command codes
*/
/*
* USB cmd_in pipe response codes
*/
/*
* Number of bits used for different radio setups
*/
#ifdef __cplusplus
}
#endif
#endif /* _ZYD_REG_H */