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47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll * Use is subject to license terms.
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll * TPM Interface Specification Defaults
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll * ICH7 spec (pg 253) says this is the base
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll * TPM on LPC: FED40000-FED40FFF But this is only locality 0
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll * It has to include 4 localities so the real range is FED40000-FED44FFF
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll * (TIS 1.2 pg 27)
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* Used to gain ownership */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* Enable Interrupts */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* Interrupt vector (SIRQ values) */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* What caused interrupt */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* Supported Interrupts */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* Status Register */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* I/O FIFO */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* Vendor and Device ID */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* Revision ID */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* The number of all ordinals */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* Timeouts (in milliseconds) (TIS v1.2 pg 43) */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll#define TPM_REQUEST_TIMEOUT 9000000 /* 9 seconds...too long? */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll#define TPM_POLLING_TIMEOUT 10000 /* 10 ms for polling */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* Possible TPM_ACCESS register bit values (TIS 1.2 pg.47-49) */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* Possible TPM_STS register values (TIS 1.2 pg.52-54) */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll /* bit 0 and bit 2 are reserved */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* Possible TPM_INTF_CAPABILITY register values (TIS 1.2 pg.55) */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* Possible TPM_INT_ENABLE register values (TIS 1.2 pg.62-63) */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* Interrupt enable bit for TPM_INT_ENABLE_x register */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll/* Too big to fit in enum... */
47e946e784719ae402ace34695f67b0e6e76ae5cWyllys Ingersoll#endif /* _TPM_TIS_H */