/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _TPM_TIS_H
#define _TPM_TIS_H
/*
* TPM Interface Specification Defaults
* ICH7 spec (pg 253) says this is the base
* TPM on LPC: FED40000-FED40FFF But this is only locality 0
* It has to include 4 localities so the real range is FED40000-FED44FFF
* (TIS 1.2 pg 27)
*/
/* Used to gain ownership */
/* Enable Interrupts */
/* Interrupt vector (SIRQ values) */
/* What caused interrupt */
/* Supported Interrupts */
/* Status Register */
/* I/O FIFO */
/* Vendor and Device ID */
/* Revision ID */
/* The number of all ordinals */
/* Timeouts (in milliseconds) (TIS v1.2 pg 43) */
enum tis_timeouts {
};
/* Possible TPM_ACCESS register bit values (TIS 1.2 pg.47-49) */
enum tis_access {
};
/* Possible TPM_STS register values (TIS 1.2 pg.52-54) */
enum tis_status {
/* bit 0 and bit 2 are reserved */
};
/* Possible TPM_INTF_CAPABILITY register values (TIS 1.2 pg.55) */
enum tis_intf_cap {
};
/* Possible TPM_INT_ENABLE register values (TIS 1.2 pg.62-63) */
/* Interrupt enable bit for TPM_INT_ENABLE_x register */
/* Too big to fit in enum... */
enum tis_int_enable {
};
#endif /* _TPM_TIS_H */