rt2860_reg.h revision 8a3c961b6b8e22607c570d092514b791eb1519e9
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* Copyright (c) 2007, 2008
* Damien Bergamini <damien.bergamini@free.fr>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef _RT2860_REG_H
#define _RT2860_REG_H
#ifdef __cplusplus
extern "C" {
#endif
/* Device ID */
#define PRODUCT_RALINK_RT2860 0x0601
#define PRODUCT_RALINK_RT2890 0x0681
#define PRODUCT_RALINK_RT2760 0x0701
#define PRODUCT_RALINK_RT2790 0x0781
#define PRODUCT_AWT_RT2890 0x1059
/* PCI registers */
#define RT2860_PCI_CFG 0x0000
#define RT2860_PCI_EECTRL 0x0004
#define RT2860_PCI_MCUCTRL 0x0008
#define RT2860_PCI_SYSCTRL 0x000c
#define RT2860_PCIE_JTAG 0x0010
#define RT2860_INT_STATUS 0x0200
#define RT2860_INT_MASK 0x0204
#define RT2860_WPDMA_GLO_CFG 0x0208
#define RT2860_WPDMA_RST_IDX 0x020c
#define RT2860_DELAY_INT_CFG 0x0210
#define RT2860_WMM_AIFSN_CFG 0x0214
#define RT2860_WMM_CWMIN_CFG 0x0218
#define RT2860_WMM_CWMAX_CFG 0x021c
#define RT2860_WMM_TXOP0_CFG 0x0220
#define RT2860_WMM_TXOP1_CFG 0x0224
#define RT2860_GPIO_CTRL 0x0228
#define RT2860_MCU_CMD_REG 0x022c
#define RT2860_RX_BASE_PTR 0x0290
#define RT2860_RX_MAX_CNT 0x0294
#define RT2860_RX_CALC_IDX 0x0298
#define RT2860_FS_DRX_IDX 0x029c
#define RT2860_US_CYC_CNT 0x02a4
/* PBF registers */
#define RT2860_SYS_CTRL 0x0400
#define RT2860_HOST_CMD 0x0404
#define RT2860_PBF_CFG 0x0408
#define RT2860_MAX_PCNT 0x040c
#define RT2860_BUF_CTRL 0x0410
#define RT2860_MCU_INT_STA 0x0414
#define RT2860_MCU_INT_ENA 0x0418
#define RT2860_RX0Q_IO 0x0424
#define RT2860_BCN_OFFSET0 0x042c
#define RT2860_BCN_OFFSET1 0x0430
#define RT2860_TXRXQ_STA 0x0434
#define RT2860_TXRXQ_PCNT 0x0438
#define RT2860_PBF_DBG 0x043c
#define RT2860_CAP_CTRL 0x0440
/* MAC registers */
#define RT2860_ASIC_VER_ID 0x1000
#define RT2860_MAC_SYS_CTRL 0x1004
#define RT2860_MAC_ADDR_DW0 0x1008
#define RT2860_MAC_ADDR_DW1 0x100c
#define RT2860_MAC_BSSID_DW0 0x1010
#define RT2860_MAC_BSSID_DW1 0x1014
#define RT2860_MAX_LEN_CFG 0x1018
#define RT2860_BBP_CSR_CFG 0x101c
#define RT2860_RF_CSR_CFG0 0x1020
#define RT2860_RF_CSR_CFG1 0x1024
#define RT2860_RF_CSR_CFG2 0x1028
#define RT2860_LED_CFG 0x102c
/* undocumented registers */
#define RT2860_DEBUG 0x10f4
/* MAC Timing control registers */
#define RT2860_XIFS_TIME_CFG 0x1100
#define RT2860_BKOFF_SLOT_CFG 0x1104
#define RT2860_NAV_TIME_CFG 0x1108
#define RT2860_CH_TIME_CFG 0x110c
#define RT2860_PBF_LIFE_TIMER 0x1110
#define RT2860_BCN_TIME_CFG 0x1114
#define RT2860_TBTT_SYNC_CFG 0x1118
#define RT2860_TSF_TIMER_DW0 0x111c
#define RT2860_TSF_TIMER_DW1 0x1120
#define RT2860_TBTT_TIMER 0x1124
#define RT2860_INT_TIMER_CFG 0x1128
#define RT2860_INT_TIMER_EN 0x112c
#define RT2860_CH_IDLE_TIME 0x1130
/* MAC Power Save configuration registers */
#define RT2860_MAC_STATUS_REG 0x1200
#define RT2860_PWR_PIN_CFG 0x1204
#define RT2860_AUTO_WAKEUP_CFG 0x1208
/* MAC TX configuration registers */
#define RT2860_EDCA_TID_AC_MAP 0x1310
#define RT2860_TX_PIN_CFG 0x1328
#define RT2860_TX_BAND_CFG 0x132c
#define RT2860_TX_SW_CFG0 0x1330
#define RT2860_TX_SW_CFG1 0x1334
#define RT2860_TX_SW_CFG2 0x1338
#define RT2860_TXOP_THRES_CFG 0x133c
#define RT2860_TXOP_CTRL_CFG 0x1340
#define RT2860_TX_RTS_CFG 0x1344
#define RT2860_TX_TIMEOUT_CFG 0x1348
#define RT2860_TX_RTY_CFG 0x134c
#define RT2860_TX_LINK_CFG 0x1350
#define RT2860_HT_FBK_CFG0 0x1354
#define RT2860_HT_FBK_CFG1 0x1358
#define RT2860_LG_FBK_CFG0 0x135c
#define RT2860_LG_FBK_CFG1 0x1360
#define RT2860_CCK_PROT_CFG 0x1364
#define RT2860_OFDM_PROT_CFG 0x1368
#define RT2860_MM20_PROT_CFG 0x136c
#define RT2860_MM40_PROT_CFG 0x1370
#define RT2860_GF20_PROT_CFG 0x1374
#define RT2860_GF40_PROT_CFG 0x1378
#define RT2860_EXP_CTS_TIME 0x137c
#define RT2860_EXP_ACK_TIME 0x1380
/* MAC RX configuration registers */
#define RT2860_RX_FILTR_CFG 0x1400
#define RT2860_AUTO_RSP_CFG 0x1404
#define RT2860_LEGACY_BASIC_RATE 0x1408
#define RT2860_HT_BASIC_RATE 0x140c
#define RT2860_HT_CTRL_CFG 0x1410
#define RT2860_SIFS_COST_CFG 0x1414
#define RT2860_RX_PARSER_CFG 0x1418
/* MAC Security configuration registers */
#define RT2860_TX_SEC_CNT0 0x1500
#define RT2860_RX_SEC_CNT0 0x1504
#define RT2860_CCMP_FC_MUTE 0x1508
#define RT2860_TXOP_HLDR_ADDR0 0x1600
#define RT2860_TXOP_HLDR_ADDR1 0x1604
#define RT2860_TXOP_HLDR_ET 0x1608
#define RT2860_QOS_CFPOLL_RA_DW0 0x160c
#define RT2860_QOS_CFPOLL_A1_DW1 0x1610
#define RT2860_QOS_CFPOLL_QC 0x1614
/* MAC Statistics Counters */
#define RT2860_RX_STA_CNT0 0x1700
#define RT2860_RX_STA_CNT1 0x1704
#define RT2860_RX_STA_CNT2 0x1708
#define RT2860_TX_STA_CNT0 0x170c
#define RT2860_TX_STA_CNT1 0x1710
#define RT2860_TX_STA_CNT2 0x1714
#define RT2860_TX_STAT_FIFO 0x1718
/* RX WCID search table */
#define RT2860_FW_BASE 0x2000
/* Pair-wise key table */
/* WCID attribute table */
/* Shared Key Table */
/* Shared Key Mode */
#define RT2860_SKEY_MODE_0_7 0x7000
#define RT2860_SKEY_MODE_8_15 0x7004
#define RT2860_SKEY_MODE_16_23 0x7008
#define RT2860_SKEY_MODE_24_31 0x700c
/* Shared Memory between MCU and host */
#define RT2860_H2M_MAILBOX 0x7010
#define RT2860_H2M_BBPAGENT 0x7028
/* possible flags for register RT2860_PCI_EECTRL */
#define RT2860_C (1 << 0)
#define RT2860_SHIFT_D 2
#define RT2860_SHIFT_Q 3
/* possible flags for registers INT_STATUS/INT_MASK */
#define RT2860_RX_DLY_INT (1 << 0)
/* possible flags for register WPDMA_GLO_CFG */
#define RT2860_HDR_SEG_LEN_SHIFT 8
#define RT2860_WPDMA_BT_SIZE_SHIFT 4
#define RT2860_WPDMA_BT_SIZE16 0
#define RT2860_WPDMA_BT_SIZE32 1
#define RT2860_WPDMA_BT_SIZE64 2
#define RT2860_WPDMA_BT_SIZE128 3
#define RT2860_TX_DMA_EN (1 << 0)
/* possible flags for register DELAY_INT_CFG */
#define RT2860_TXMAX_PINT_SHIFT 24
#define RT2860_TXMAX_PTIME_SHIFT 16
#define RT2860_RXMAX_PINT_SHIFT 8
#define RT2860_RXMAX_PTIME_SHIFT 0
/* possible flags for register GPIO_CTRL */
#define RT2860_GPIO_D_SHIFT 8
#define RT2860_GPIO_O_SHIFT 0
/* possible flags for register US_CYC_CNT */
#define RT2860_TEST_SEL_SHIFT 16
#define RT2860_US_CYC_CNT_SHIFT 0
/* possible flags for register SYS_CTRL */
#define RT2860_MCU_RESET (1 << 0)
/* possible values for register HOST_CMD */
#define RT2860_MCU_CMD_SLEEP 0x30
#define RT2860_MCU_CMD_WAKEUP 0x31
#define RT2860_MCU_CMD_LEDS 0x50
#define RT2860_MCU_CMD_LED_RSSI 0x51
#define RT2860_MCU_CMD_LED1 0x52
#define RT2860_MCU_CMD_LED2 0x53
#define RT2860_MCU_CMD_LED3 0x54
#define RT2860_MCU_CMD_BOOT 0x72
#define RT2860_MCU_CMD_BBP 0x80
#define RT2860_MCU_CMD_PSLEVEL 0x83
/* possible flags for register PBF_CFG */
#define RT2860_TX1Q_NUM_SHIFT 21
#define RT2860_TX2Q_NUM_SHIFT 16
/* possible flags for register BUF_CTRL */
#define RT2860_READ_RX0Q (1 << 0)
/* possible flags for registers MCU_INT_STA/MCU_INT_ENA */
#define RT2860_MRX0_INT (1 << 0)
/* possible flags for register CAP_CTRL */
#define RT2860_TRIG_OFFSET_SHIFT 16
#define RT2860_START_ADDR_SHIFT 0
/* possible flags for register MAC_SYS_CTRL */
#define RT2860_MAC_SRST (1 << 0)
/* possible flags for register MAC_BSSID_DW1 */
#define RT2860_MULTI_BCN_NUM_SHIFT 18
#define RT2860_MULTI_BSSID_MODE_SHIFT 16
/* possible flags for register MAX_LEN_CFG */
#define RT2860_MIN_MPDU_LEN_SHIFT 16
#define RT2860_MAX_PSDU_LEN_SHIFT 12
#define RT2860_MAX_PSDU_LEN8K 0
#define RT2860_MAX_PSDU_LEN16K 1
#define RT2860_MAX_PSDU_LEN32K 2
#define RT2860_MAX_PSDU_LEN64K 3
#define RT2860_MAX_MPDU_LEN_SHIFT 0
/* possible flags for registers BBP_CSR_CFG/H2M_BBPAGENT */
#define RT2860_BBP_ADDR_SHIFT 8
#define RT2860_BBP_DATA_SHIFT 0
/* possible flags for register RF_CSR_CFG0 */
#define RT2860_RF_REG_WIDTH_SHIFT 24
#define RT2860_RF_REG_0_SHIFT 0
/* possible flags for register RF_CSR_CFG1 */
#define RT2860_RF_REG_1_SHIFT 0
/* possible flags for register LED_CFG */
#define RT2860_Y_LED_MODE_SHIFT 28
#define RT2860_G_LED_MODE_SHIFT 26
#define RT2860_R_LED_MODE_SHIFT 24
#define RT2860_LED_MODE_OFF 0
#define RT2860_LED_MODE_BLINK_TX 1
#define RT2860_LED_MODE_SLOW_BLINK 2
#define RT2860_LED_MODE_ON 3
#define RT2860_SLOW_BLK_TIME_SHIFT 16
#define RT2860_LED_OFF_TIME_SHIFT 8
#define RT2860_LED_ON_TIME_SHIFT 0
/* possible flags for register XIFS_TIME_CFG */
#define RT2860_EIFS_TIME_SHIFT 20
#define RT2860_OFDM_XIFS_TIME_SHIFT 16
#define RT2860_OFDM_SIFS_TIME_SHIFT 8
#define RT2860_CCK_SIFS_TIME_SHIFT 0
/* possible flags for register BKOFF_SLOT_CFG */
#define RT2860_CC_DELAY_TIME_SHIFT 8
#define RT2860_SLOT_TIME 0
/* possible flags for register NAV_TIME_CFG */
#define RT2860_NAV_UPD_VAL_SHIFT 16
#define RT2860_NAV_TIMER_SHIFT 0
/* possible flags for register CH_TIME_CFG */
#define RT2860_CH_STA_TIMER_EN (1 << 0)
/* possible values for register BCN_TIME_CFG */
#define RT2860_TSF_INS_COMP_SHIFT 24
#define RT2860_TSF_SYNC_MODE_SHIFT 17
#define RT2860_TSF_SYNC_MODE_DIS 0
#define RT2860_TSF_SYNC_MODE_STA 1
#define RT2860_TSF_SYNC_MODE_IBSS 2
#define RT2860_TSF_SYNC_MODE_HOSTAP 3
#define RT2860_BCN_INTVAL_SHIFT 0
/* possible flags for register TBTT_SYNC_CFG */
#define RT2860_BCN_CWMIN_SHIFT 20
#define RT2860_BCN_AIFSN_SHIFT 16
#define RT2860_BCN_EXP_WIN_SHIFT 8
#define RT2860_TBTT_ADJUST_SHIFT 0
/* possible flags for register INT_TIMER_CFG */
#define RT2860_GP_TIMER_SHIFT 16
#define RT2860_PRE_TBTT_TIMER_SHIFT 0
/* possible flags for register INT_TIMER_EN */
#define RT2860_PRE_TBTT_INT_EN (1 << 0)
/* possible flags for register MAC_STATUS_REG */
#define RT2860_TX_STATUS_BUSY (1 << 0)
/* possible flags for register PWR_PIN_CFG */
#define RT2860_IO_RF_PE (1 << 0)
/* possible flags for register AUTO_WAKEUP_CFG */
#define RT2860_SLEEP_TBTT_NUM_SHIFT 8
#define RT2860_WAKEUP_LEAD_TIME_SHIFT 0
/* possible flags for register TX_PIN_CFG */
#define RT2860_PA_PE_A0_EN (1 << 0)
/* possible flags for register TX_BAND_CFG */
#define RT2860_TX_BAND_SEL (1 << 0)
/* possible flags for register TX_SW_CFG0 */
#define RT2860_DLY_RFTR_EN_SHIFT 24
#define RT2860_DLY_TRSW_EN_SHIFT 16
#define RT2860_DLY_PAPE_EN_SHIFT 8
#define RT2860_DLY_TXPE_EN_SHIFT 0
/* possible flags for register TX_SW_CFG1 */
#define RT2860_DLY_RFTR_DIS_SHIFT 16
#define RT2860_DLY_TRSW_DIS_SHIFT 8
#define RT2860_DLY_PAPE_DIS SHIFT 0
/* possible flags for register TX_SW_CFG2 */
#define RT2860_DLY_LNA_EN_SHIFT 24
#define RT2860_DLY_LNA_DIS_SHIFT 16
#define RT2860_DLY_DAC_EN_SHIFT 8
#define RT2860_DLY_DAC_DIS_SHIFT 0
/* possible flags for register TXOP_THRES_CFG */
#define RT2860_TXOP_REM_THRES_SHIFT 24
#define RT2860_CF_END_THRES_SHIFT 16
#define RT2860_RDG_IN_THRES 8
#define RT2860_RDG_OUT_THRES 0
/* possible flags for register TXOP_CTRL_CFG */
#define RT2860_EXT_CW_MIN_SHIFT 16
#define RT2860_EXT_CCA_DLY_SHIFT 8
#define RT2860_TXOP_TRUN_EN_TIMEOUT (1 << 0)
/* possible flags for register TX_RTS_CFG */
#define RT2860_RTS_THRES_SHIFT 8
#define RT2860_RTS_RTY_LIMIT_SHIFT 0
/* possible flags for register TX_TIMEOUT_CFG */
#define RT2860_TXOP_TIMEOUT_SHIFT 16
#define RT2860_RX_ACK_TIMEOUT_SHIFT 8
#define RT2860_MPDU_LIFE_TIME_SHIFT 4
/* possible flags for register TX_RTY_CFG */
#define RT2860_LONG_RTY_THRES_SHIFT 16
#define RT2860_LONG_RTY_LIMIT_SHIFT 8
#define RT2860_SHORT_RTY_LIMIT_SHIFT 0
/* possible flags for register TX_LINK_CFG */
#define RT2860_REMOTE_MFS_SHIFT 24
#define RT2860_REMOTE_MFB_SHIFT 16
#define RT2860_REMOTE_MFB_LT_SHIFT 0
/* possible flags for registers *_PROT_CFG */
/* possible flags for registers EXP_{CTS,ACK}_TIME */
#define RT2860_EXP_OFDM_TIME_SHIFT 16
#define RT2860_EXP_CCK_TIME_SHIFT 0
/* possible flags for register RX_FILTR_CFG */
#define RT2860_DROP_CRC_ERR (1 << 0)
/* possible flags for register AUTO_RSP_CFG */
#define RT2860_AUTO_RSP_EN (1 << 0)
/* possible flags for register SIFS_COST_CFG */
#define RT2860_OFDM_SIFS_COST_SHIFT 8
#define RT2860_CCK_SIFS_COST_SHIFT 0
/* possible flags for register TXOP_HLDR_ET */
#define RT2860_TXOP_ETM_THRES_SHIFT 16
#define RT2860_TXOP_ETO_THRES_SHIFT 1
#define RT2860_PER_RX_RST_EN (1 << 0)
/* possible flags for register TX_STAT_FIFO */
#define RT2860_TXQ_MCS_SHIFT 16
#define RT2860_TXQ_WCID_SHIFT 8
#define RT2860_TXQ_PID_SHIFT 1
#define RT2860_TXQ_VLD (1 << 0)
/* possible flags for register WCID_ATTR */
#define RT2860_MODE_NOSEC 0
#define RT2860_MODE_WEP40 1
#define RT2860_MODE_WEP104 2
#define RT2860_MODE_TKIP 3
#define RT2860_MODE_AES_CCMP 4
#define RT2860_MODE_CKIP40 5
#define RT2860_MODE_CKIP104 6
#define RT2860_MODE_CKIP128 7
#define RT2860_RX_PKEY_EN (1 << 0)
/* possible flags for register H2M_MAILBOX */
#define RT2860_TOKEN_NO_INTR 0xff
/* possible flags for MCU command RT2860_MCU_CMD_LEDS */
#pragma pack(1)
/* TX descriptor */
struct rt2860_txd {
#define RT2860_TX_QSEL_SHIFT 1
#define RT2860_TX_QSEL_MGMT (0 << 1)
#define RT2860_TX_WIV (1 << 0)
};
#pragma pack()
#pragma pack(1)
/* TX Wireless Information */
struct rt2860_txwi {
#define RT2860_TX_MPDU_DSITY_SHIFT 5
#define RT2860_TX_FRAG (1 << 0)
#define RT2860_TX_TXOP_HT 0
#define RT2860_TX_TXOP_PIFS 1
#define RT2860_TX_TXOP_SIFS 2
#define RT2860_TX_TXOP_BACKOFF 3
#define RT2860_PHY_MODE 0xc000
#define RT2860_PHY_CCK (0 << 14)
#define RT2860_PHY_MCS 0x7f
#define RT2860_TX_BAWINSIZE_SHIFT 2
#define RT2860_TX_ACK (1 << 0)
#define RT2860_TX_PID_SHIFT 12
struct ieee80211_frame wh;
};
#pragma pack()
#pragma pack(1)
/* RX descriptor */
struct rt2860_rxd {
#define RT2860_RX_BA (1 << 0)
};
#pragma pack()
#pragma pack(1)
/* RX Wireless Information */
struct rt2860_rxwi {
#define RT2860_RX_UDF_SHIFT 5
#define RT2860_RX_BSS_IDX_SHIFT 2
#define RT2860_RX_TID_SHIFT 12
};
#pragma pack()
#define RAL_RF1 0
#define RAL_RF2 2
#define RAL_RF3 1
#define RAL_RF4 3
#define RT2860_EEPROM_VERSION 0x01
#define RT2860_EEPROM_MAC01 0x02
#define RT2860_EEPROM_MAC23 0x03
#define RT2860_EEPROM_MAC45 0x04
#define RT2860_EEPROM_PCIE_PSLEVEL 0x11
#define RT2860_EEPROM_REV 0x12
#define RT2860_EEPROM_ANTENNA 0x1a
#define RT2860_EEPROM_CONFIG 0x1b
#define RT2860_EEPROM_COUNTRY 0x1c
#define RT2860_EEPROM_FREQ_LEDS 0x1d
#define RT2860_EEPROM_LED1 0x1e
#define RT2860_EEPROM_LED2 0x1f
#define RT2860_EEPROM_LED3 0x20
#define RT2860_EEPROM_LNA 0x22
#define RT2860_EEPROM_RSSI1_2GHZ 0x23
#define RT2860_EEPROM_RSSI2_2GHZ 0x24
#define RT2860_EEPROM_RSSI1_5GHZ 0x25
#define RT2860_EEPROM_RSSI2_5GHZ 0x26
#define RT2860_EEPROM_DELTAPWR 0x28
#define RT2860_EEPROM_PWR2GHZ_BASE1 0x29
#define RT2860_EEPROM_PWR2GHZ_BASE2 0x30
#define RT2860_EEPROM_TSSI1_2GHZ 0x37
#define RT2860_EEPROM_TSSI2_2GHZ 0x38
#define RT2860_EEPROM_TSSI3_2GHZ 0x39
#define RT2860_EEPROM_TSSI4_2GHZ 0x3a
#define RT2860_EEPROM_TSSI5_2GHZ 0x3b
#define RT2860_EEPROM_PWR5GHZ_BASE1 0x3c
#define RT2860_EEPROM_PWR5GHZ_BASE2 0x53
#define RT2860_EEPROM_TSSI1_5GHZ 0x6a
#define RT2860_EEPROM_TSSI2_5GHZ 0x6b
#define RT2860_EEPROM_TSSI3_5GHZ 0x6c
#define RT2860_EEPROM_TSSI4_5GHZ 0x6d
#define RT2860_EEPROM_TSSI5_5GHZ 0x6e
#define RT2860_EEPROM_RPWR 0x6f
#define RT2860_EEPROM_BBP_BASE 0x78
/*
* control and status registers access macros
*/
/*
* EEPROM access macro
*/
}
/*
* Default values for MAC registers; values taken from the reference driver.
*/
#define RT2860_DEF_MAC \
{ RT2860_BCN_OFFSET0, 0xf8f0e8e0 }, \
{ RT2860_LEGACY_BASIC_RATE, 0x0000013f }, \
{ RT2860_HT_BASIC_RATE, 0x00008003 }, \
{ RT2860_MAC_SYS_CTRL, 0x00000000 }, \
{ RT2860_BKOFF_SLOT_CFG, 0x00000209 }, \
{ RT2860_TX_SW_CFG0, 0x00040a06 }, \
{ RT2860_TX_SW_CFG1, 0x00080606 }, \
{ RT2860_TX_LINK_CFG, 0x00001020 }, \
{ RT2860_TX_TIMEOUT_CFG, 0x000a2090 }, \
{ RT2860_LED_CFG, 0x7f031e46 }, \
{ RT2860_WMM_AIFSN_CFG, 0x00002273 }, \
{ RT2860_WMM_CWMIN_CFG, 0x00002344 }, \
{ RT2860_WMM_CWMAX_CFG, 0x000034aa }, \
{ RT2860_MAX_PCNT, 0x1f3fbf9f }, \
{ RT2860_TX_RTY_CFG, 0x47d01f0f }, \
{ RT2860_AUTO_RSP_CFG, 0x00000013 }, \
{ RT2860_CCK_PROT_CFG, 0x05740003 }, \
{ RT2860_OFDM_PROT_CFG, 0x05740003 }, \
{ RT2860_GF20_PROT_CFG, 0x01744004 }, \
{ RT2860_GF40_PROT_CFG, 0x03f44084 }, \
{ RT2860_MM20_PROT_CFG, 0x01744004 }, \
{ RT2860_MM40_PROT_CFG, 0x03f54084 }, \
{ RT2860_TXOP_CTRL_CFG, 0x0000583f }, \
{ RT2860_TXOP_HLDR_ET, 0x00000002 }, \
{ RT2860_TX_RTS_CFG, 0x00092b20 }, \
{ RT2860_EXP_ACK_TIME, 0x002400ca }, \
{ RT2860_XIFS_TIME_CFG, 0x33a41010 }, \
{ RT2860_PWR_PIN_CFG, 0x00000003 }
/*
* Default values for BBP registers; values taken from the reference driver.
*/
#define RT2860_DEF_BBP \
{ 65, 0x2c }, \
{ 66, 0x38 }, \
{ 69, 0x12 }, \
{ 73, 0x10 }, \
{ 81, 0x37 }, \
{ 82, 0x62 }, \
{ 83, 0x6a }, \
{ 84, 0x19 }, \
{ 86, 0x00 }, \
{ 91, 0x04 }, \
{ 92, 0x00 }, \
{ 105, 0x01 }
/*
* Default settings for RF registers; values derived from the reference driver.
*/
#define RT2860_RF2850 \
{ 1, 0x100bb3, 0x1301e1, 0x05a014, 0x001402 }, \
{ 2, 0x100bb3, 0x1301e1, 0x05a014, 0x001407 }, \
{ 3, 0x100bb3, 0x1301e2, 0x05a014, 0x001402 }, \
{ 4, 0x100bb3, 0x1301e2, 0x05a014, 0x001407 }, \
{ 5, 0x100bb3, 0x1301e3, 0x05a014, 0x001402 }, \
{ 6, 0x100bb3, 0x1301e3, 0x05a014, 0x001407 }, \
{ 7, 0x100bb3, 0x1301e4, 0x05a014, 0x001402 }, \
{ 8, 0x100bb3, 0x1301e4, 0x05a014, 0x001407 }, \
{ 9, 0x100bb3, 0x1301e5, 0x05a014, 0x001402 }, \
{ 10, 0x100bb3, 0x1301e5, 0x05a014, 0x001407 }, \
{ 11, 0x100bb3, 0x1301e6, 0x05a014, 0x001402 }, \
{ 12, 0x100bb3, 0x1301e6, 0x05a014, 0x001407 }, \
{ 13, 0x100bb3, 0x1301e7, 0x05a014, 0x001402 }, \
{ 14, 0x100bb3, 0x1301e8, 0x05a014, 0x001404 }, \
{ 36, 0x100bb3, 0x130266, 0x056014, 0x001408 }, \
{ 38, 0x100bb3, 0x130267, 0x056014, 0x001404 }, \
{ 40, 0x100bb2, 0x1301a0, 0x056014, 0x001400 }, \
{ 44, 0x100bb2, 0x1301a0, 0x056014, 0x001408 }, \
{ 46, 0x100bb2, 0x1301a1, 0x056014, 0x001402 }, \
{ 48, 0x100bb2, 0x1301a1, 0x056014, 0x001406 }, \
{ 52, 0x100bb2, 0x1301a2, 0x056014, 0x001404 }, \
{ 54, 0x100bb2, 0x1301a2, 0x056014, 0x001408 }, \
{ 56, 0x100bb2, 0x1301a3, 0x056014, 0x001402 }, \
{ 60, 0x100bb2, 0x1301a4, 0x056014, 0x001400 }, \
{ 62, 0x100bb2, 0x1301a4, 0x056014, 0x001404 }, \
{ 64, 0x100bb2, 0x1301a4, 0x056014, 0x001408 }, \
{ 100, 0x100bb2, 0x1301ac, 0x05e014, 0x001400 }, \
{ 102, 0x100bb2, 0x1301ac, 0x05e014, 0x001404 }, \
{ 104, 0x100bb2, 0x1301ac, 0x05e014, 0x001408 }, \
{ 108, 0x100bb3, 0x13028c, 0x05e014, 0x001404 }, \
{ 110, 0x100bb3, 0x13028d, 0x05e014, 0x001400 }, \
{ 112, 0x100bb3, 0x13028d, 0x05e014, 0x001406 }, \
{ 116, 0x100bb3, 0x13028e, 0x05e014, 0x001408 }, \
{ 118, 0x100bb3, 0x13028f, 0x05e014, 0x001404 }, \
{ 120, 0x100bb1, 0x1300e0, 0x05e014, 0x001400 }, \
{ 124, 0x100bb1, 0x1300e0, 0x05e014, 0x001404 }, \
{ 126, 0x100bb1, 0x1300e0, 0x05e014, 0x001406 }, \
{ 128, 0x100bb1, 0x1300e0, 0x05e014, 0x001408 }, \
{ 132, 0x100bb1, 0x1300e1, 0x05e014, 0x001402 }, \
{ 134, 0x100bb1, 0x1300e1, 0x05e014, 0x001404 }, \
{ 136, 0x100bb1, 0x1300e1, 0x05e014, 0x001406 }, \
{ 140, 0x100bb1, 0x1300e2, 0x05e014, 0x001400 }, \
{ 149, 0x100bb1, 0x1300e2, 0x05e014, 0x001409 }, \
{ 151, 0x100bb1, 0x1300e3, 0x05e014, 0x001401 }, \
{ 153, 0x100bb1, 0x1300e3, 0x05e014, 0x001403 }, \
{ 157, 0x100bb1, 0x1300e3, 0x05e014, 0x001407 }, \
{ 159, 0x100bb1, 0x1300e3, 0x05e014, 0x001409 }, \
{ 161, 0x100bb1, 0x1300e4, 0x05e014, 0x001401 }, \
{ 165, 0x100bb1, 0x1300e4, 0x05e014, 0x001405 }
#ifdef __cplusplus
}
#endif
#endif /* _RT2860_REG_H */