/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2010 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* Copyright 2012 Nexenta Systems, Inc. All rights reserved.
*/
/*
* rtls -- REALTEK 8139-serials PCI Fast Ethernet Driver.
*
* This product is covered by one or more of the following patents:
* US5,307,459, US5,434,872, US5,732,094, US6,570,884, US6,115,776, and
* US6,327,625.
*
* Currently supports:
* RTL8139
*/
#ifndef _SYS_RTLS_H
#define _SYS_RTLS_H
#ifdef __cplusplus
extern "C" {
#endif
/* Debug flags */
#ifdef DEBUG
#endif
/*
* Driver support device
*/
/* bind vendor and device id together */
/*
*/
/*
* RTL8139 CRC poly
*/
/*
* STREAMS parameters
*/
/* driver flow control high water */
/*
* Helpful defines for register access
*/
typedef struct {
} dma_area_t;
typedef struct rtls_stats {
} rtls_stats_t;
typedef struct rtls_instance {
/* io handle & iblock */
/* dma buffer alloc used */
/* transmit dma area */
/* used for multicast set */
/* used for send */
/* used for recv */
/* mutex */
/* send reschedule used */
/* current MAC state */
/* rtls statistics */
} rtls_t;
/* 4-bytes aligned, also with RTLS_RX_BUF_RING boundary */
/* parameter definition in rtls.conf file */
/*
* RealTek 8129/8139 register offsets definition
*/
/*
* MAC address register, initial value isautoloaded from the
* EEPROM EthernetID field
*/
/*
* Multicast register
*/
/*
* Transmit status register
*/
/* The total size in bytes of the data in this descriptor */
/*
* The read-only bits (CRS, TABT, OWC, CDH, NCC3-0, TOK, TUN) will be cleared
* by the RTL8139 when the Transmit Byte Count (bit12-0) in the corresponding
* Tx descriptor is written. If h/w transmit finish, at least some of these
* bits are none zero.
*/
/*
* Transmit start address of descriptors
*/
/*
* Receive buffer start address
*/
/*
* Early receive byte count register
*/
/*
* Commond register
*/
/*
* Rx current read address register
*/
/*
* Value in RX_CURRENT_READ_ADDR_REG is 16 less than
* the actual rx read address
*/
/*
* Interrupt register
*/
/*
* Transmit configuration register
*/
/* re-transmit count (16 + 1 * 16) = 32 times before aborting */
/*
* Receive configuration register
*/
RX_BUF_LEN_32K | \
/*
* Missed packet counter: indicates the number of packets
* discarded due to rx FIFO overflow
*/
/*
* 93c46(93c56) commond register:
*/
/*
* Configuration registers
*/
/*
* Media status register
*/
#define RTLS_SPEED_UNKNOWN 0
/*
* Multiple interrupt select register
*/
/*
* Transmit status of all descriptor registers register
*/
/*
* Basic mode control register
*/
/*
* Basic mode status register
*/
/*
* Auto-negotiation advertisement register
*/
/*
* Auto-negotiation link partner ability register
*/
/*
* Auto-negotiation expansion register
*/
/*
* Receive status in rx packet header
*/
#ifdef __cplusplus
}
#endif
#endif /* _SYS_RTLS_H */