/*
* Copyright 2011 Jason King.
* Copyright (c) 2000 Berkeley Software Design, Inc.
* Copyright (c) 1997, 1998, 1999, 2000
* Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Bill Paul.
* 4. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef _PCN_H
#define _PCN_H
#ifdef __cplusplus
extern "C" {
#endif
/*
* 16-bit I/O map
* To switch to 32-bit mode, write to RDP.
*/
/*
* 32-bit I/O map
*/
/*
* CSR registers
*/
#define PCN_CSR_STR \
"\020" \
"\001INIT" \
"\002START" \
"\003STOP" \
"\004TX" \
"\005TXON" \
"\006RXON" \
"\007INTEN" \
"\010INTR" \
"\011IDONE" \
"\012TINT" \
"\013RINT" \
"\014MERR" \
"\015MISS" \
"\016CERR" \
"\017ERR"
/*
* Interrupt masks and deferral control (CSR3)
*/
#define PCN_IMR_STR \
"\020" \
"\003BSWAP" \
"\004ENMBA" \
"\005DXMT2PD" \
"\006LAPPEN" \
"\007DXSUFLO" \
"\010IDONE" \
"\011TINT" \
"\012RINT" \
"\013MERR" \
"\014MISS"
/*
* Test and features control (CSR4)
*/
/*
* Extended control and interrupt 1 (CSR5)
*/
#define PCN_EXTCTL1_STR \
"\020" \
"\001SPND" \
"\002MPMODE" \
"\003MPENB" \
"\004MPINTEN" \
"\005MPINT" \
"\006MPPLB" \
"\007EXDEFEN" \
"\010EXDEF" \
"\013SINTEN" \
"\014SINT" \
"\017LTINTEN" \
"\020TXOKINTD"
/*
*/
/*
* Extended control and interrupt 2 (CSR7)
*/
#define PCN_EXTCTL2_STR \
"\020" \
"\001MIIPDTINTE" \
"\002MIIPDTINT" \
"\003MCCIINTTE" \
"\004MCCIINT" \
"\005MCCINTE" \
"\006MCCINT" \
"\007MAPINTE" \
"\010MAPINT" \
"\011MRTINTE" \
"\012MREINT" \
"\013STINTE" \
"\014STINT" \
"\015RXDPOLL" \
"\016RDMD" \
"\017RXFRTG" \
"\020FASTSPNDE"
/*
* Mode (CSR15)
*/
#define PCN_MODE_STR \
"\020" \
"\001RXD" \
"\002TXD" \
"\003LOOP" \
"\004TXCRCD" \
"\005FORCECOLL" \
"\006RETRYD" \
"\007INTLOOP" \
"\016RXVPAD" \
"\017RXNOBROAD" \
"\020PROMISC"
/* Settings for PCN_MODE_PORTSEL when ASEL (BCR2[1]) is 0 */
/*
* Chip ID values.
*/
/* CSR88-89: Chip ID masks */
/*
* Advanced feature control (CSR122)
*/
/*
* BCR (bus control) registers
*/
/*
* Miscellaneous Configuration (BCR2)
*/
/*
* Full duplex control (BCR9)
*/
/*
* Burst and bus control register (BCR18)
*/
/*
* EEPROM control (BCR19)
*/
/*
* Software style (BCR20)
*/
/*
* MII control and status (BCR32)
*/
/*
* MII address register (BCR33)
*/
/* addresses of internal PHYs */
/*
* MII data register (BCR34)
*/
/*
* PHY selection (BCR49) (HomePNA NIC only)
*/
#ifdef __cplusplus
}
#endif
#endif /* _PCN_H */