/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
*/
/*
* Copyright 2012 Nexenta Systems, Inc. All rights reserved.
* Copyright 2016 OmniTI Computer Consulting, Inc. All rights reserved.
*/
#include "ixgbe_sw.h"
/*
* Update driver private statistics.
*/
static int
{
int i;
if (rw == KSTAT_WRITE)
return (EACCES);
/*
* Basic information
*/
#ifdef IXGBE_DEBUG
for (i = 0; i < ixgbe->num_rx_rings; i++) {
}
for (i = 0; i < ixgbe->num_tx_rings; i++) {
}
#endif
/*
* Hardware calculated statistics.
*/
for (i = 0; i < 16; i++) {
case ixgbe_mac_82598EB:
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
break;
default:
break;
}
}
/*
* This is a Workaround:
* Currently h/w GORCH, GOTCH, TORH registers are not
* correctly implemented. We found that the values in
* these registers are same as those in corresponding
* *L registers (i.e. GORCL, GOTCL, and TORL). Here the
* gor and got stat data will not be retrieved through
* GORC{H/L} and GOTC{H/L} registers but be obtained by
* stat data will not be accurate.
*/
for (i = 0; i < 8; i++)
case ixgbe_mac_82598EB:
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
break;
default:
break;
}
case ixgbe_mac_82598EB:
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
break;
default:
break;
}
return (0);
}
/*
* Create and initialize the driver private statistics.
*/
int
{
/*
* Create and init kstat
*/
sizeof (ixgbe_stat_t) / sizeof (kstat_named_t), 0);
"Could not create kernel statistics");
return (IXGBE_FAILURE);
}
/*
* Initialize all the statistics.
*/
#ifdef IXGBE_DEBUG
#endif
/*
* Function to provide kernel stat update on demand
*/
/*
* Add kstat to systems kstat chain
*/
return (IXGBE_SUCCESS);
}
/*
* Retrieve a value for one of the statistics.
*/
int
{
int i;
/*
* We cannot always rely on the common code maintaining
* hw->phy.speeds_supported, therefore we fall back to use the recorded
* supported speeds which were obtained during instance init in
* ixgbe_init_params().
*/
if (speeds == 0)
return (ECANCELED);
}
switch (stat) {
case MAC_STAT_IFSPEED:
break;
case MAC_STAT_MULTIRCV:
break;
case MAC_STAT_BRDCSTRCV:
break;
case MAC_STAT_MULTIXMT:
break;
case MAC_STAT_BRDCSTXMT:
break;
case MAC_STAT_NORCVBUF:
for (i = 0; i < 8; i++) {
}
break;
case MAC_STAT_IERRORS:
break;
case MAC_STAT_RBYTES:
for (i = 0; i < 16; i++) {
}
break;
case MAC_STAT_OBYTES:
for (i = 0; i < 16; i++) {
case ixgbe_mac_82598EB:
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
break;
default:
break;
}
}
break;
case MAC_STAT_IPACKETS:
break;
case MAC_STAT_OPACKETS:
break;
/* RFC 1643 stats */
case ETHER_STAT_FCS_ERRORS:
break;
break;
case ETHER_STAT_MACRCV_ERRORS:
break;
case ETHER_STAT_XCVR_ADDR:
/* The Internal PHY's MDI address for each MAC is 1 */
*val = 1;
break;
case ETHER_STAT_XCVR_ID:
break;
case ETHER_STAT_XCVR_INUSE:
switch (ixgbe->link_speed) {
*val =
break;
break;
default:
break;
}
break;
case ETHER_STAT_CAP_10GFDX:
break;
case ETHER_STAT_CAP_5000FDX:
break;
case ETHER_STAT_CAP_2500FDX:
break;
case ETHER_STAT_CAP_1000FDX:
break;
case ETHER_STAT_CAP_100FDX:
break;
case ETHER_STAT_CAP_ASMPAUSE:
break;
case ETHER_STAT_CAP_PAUSE:
break;
case ETHER_STAT_CAP_AUTONEG:
*val = 1;
break;
break;
break;
break;
break;
break;
break;
case ETHER_STAT_ADV_CAP_PAUSE:
break;
break;
case ETHER_STAT_LP_CAP_10GFDX:
break;
break;
break;
break;
case ETHER_STAT_LP_CAP_100FDX:
break;
break;
case ETHER_STAT_LP_CAP_PAUSE:
break;
break;
case ETHER_STAT_LINK_ASMPAUSE:
break;
case ETHER_STAT_LINK_PAUSE:
break;
case ETHER_STAT_LINK_AUTONEG:
break;
case ETHER_STAT_LINK_DUPLEX:
break;
break;
case ETHER_STAT_CAP_REMFAULT:
break;
case ETHER_STAT_ADV_REMFAULT:
break;
case ETHER_STAT_LP_REMFAULT:
break;
case ETHER_STAT_JABBER_ERRORS:
break;
default:
return (ENOTSUP);
}
return (EIO);
}
return (0);
}
/*
* Retrieve a value for one of the statistics for a particular rx ring
*/
int
{
return (ECANCELED);
}
switch (stat) {
case MAC_STAT_RBYTES:
break;
case MAC_STAT_IPACKETS:
break;
default:
*val = 0;
return (ENOTSUP);
}
return (0);
}
/*
* Retrieve a value for one of the statistics for a particular tx ring
*/
int
{
return (ECANCELED);
}
switch (stat) {
case MAC_STAT_OBYTES:
break;
case MAC_STAT_OPACKETS:
break;
default:
*val = 0;
return (ENOTSUP);
}
return (0);
}