080575042aba2197b425ebfd52061dea061a9aa1xy * This file is provided under a CDDLv1 license. When using or
080575042aba2197b425ebfd52061dea061a9aa1xy * redistributing this file, you may do so under this license.
080575042aba2197b425ebfd52061dea061a9aa1xy * In redistributing this file this license must be included
080575042aba2197b425ebfd52061dea061a9aa1xy * and no other modification of this header file is permitted.
080575042aba2197b425ebfd52061dea061a9aa1xy * CDDL LICENSE SUMMARY
d5c3073dbbd835e1e9b7dca0c6c770cf3cc20afachenlu chen - Sun Microsystems - Beijing China * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
080575042aba2197b425ebfd52061dea061a9aa1xy * The contents of this file are subject to the terms of Version
080575042aba2197b425ebfd52061dea061a9aa1xy * 1.0 of the Common Development and Distribution License (the "License").
080575042aba2197b425ebfd52061dea061a9aa1xy * You should have received a copy of the License with this software.
080575042aba2197b425ebfd52061dea061a9aa1xy * You can obtain a copy of the License at
080575042aba2197b425ebfd52061dea061a9aa1xy * See the License for the specific language governing permissions
080575042aba2197b425ebfd52061dea061a9aa1xy * and limitations under the License.
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
29fd2c1627adafbe0a83726c224e60b5514c7736David Höppner * Copyright 2012 David Höppner. All rights reserved.
da14cebe459d3275048785f25bd869cb09b5307fEric Cheng * Use is subject to license terms.
080575042aba2197b425ebfd52061dea061a9aa1xy * **********************************************************************
080575042aba2197b425ebfd52061dea061a9aa1xy * Module Name: e1000g_stat.c *
25f2d433de915875c8393f0b0dc14aa155997ad0xy * Abstract: Functions for processing statistics *
080575042aba2197b425ebfd52061dea061a9aa1xy * **********************************************************************
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystemsstatic uint32_t e1000g_read_phy_stat(struct e1000_hw *hw, int reg);
25f2d433de915875c8393f0b0dc14aa155997ad0xy * e1000_tbi_adjust_stats
25f2d433de915875c8393f0b0dc14aa155997ad0xy * Adjusts statistic counters when a frame is accepted
25f2d433de915875c8393f0b0dc14aa155997ad0xy * under the TBI workaround. This function has been
25f2d433de915875c8393f0b0dc14aa155997ad0xy * adapted for Solaris from shared code.
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp = (p_e1000g_stat_t)Adapter->e1000g_ksp->ks_data;
25f2d433de915875c8393f0b0dc14aa155997ad0xy /* First adjust the frame length */
080575042aba2197b425ebfd52061dea061a9aa1xy * We need to adjust the statistics counters, since the hardware
080575042aba2197b425ebfd52061dea061a9aa1xy * counters overcount this packet as a CRC error and undercount
080575042aba2197b425ebfd52061dea061a9aa1xy * the packet as a good packet
25f2d433de915875c8393f0b0dc14aa155997ad0xy /* This packet should not be counted as a CRC error */
25f2d433de915875c8393f0b0dc14aa155997ad0xy /* This packet does count as a Good Packet Received */
080575042aba2197b425ebfd52061dea061a9aa1xy * Adjust the Good Octets received counters
080575042aba2197b425ebfd52061dea061a9aa1xy * If the high bit of Gorcl (the low 32 bits of the Good Octets
080575042aba2197b425ebfd52061dea061a9aa1xy * Received Count) was one before the addition,
080575042aba2197b425ebfd52061dea061a9aa1xy * AND it is zero after, then we lost the carry out,
080575042aba2197b425ebfd52061dea061a9aa1xy * need to add one to Gorch (Good Octets Received Count High).
080575042aba2197b425ebfd52061dea061a9aa1xy * This could be simplified if all environments supported
080575042aba2197b425ebfd52061dea061a9aa1xy * 64-bit integers.
25f2d433de915875c8393f0b0dc14aa155997ad0xy if (carry_bit && ((e1000g_ksp->Gorl.value.ul & 0x80000000) == 0)) {
080575042aba2197b425ebfd52061dea061a9aa1xy * Is this a broadcast or multicast? Check broadcast first,
080575042aba2197b425ebfd52061dea061a9aa1xy * since the test for a multicast frame will test positive on
080575042aba2197b425ebfd52061dea061a9aa1xy * a broadcast frame.
080575042aba2197b425ebfd52061dea061a9aa1xy * Broadcast packet
080575042aba2197b425ebfd52061dea061a9aa1xy * Multicast packet
080575042aba2197b425ebfd52061dea061a9aa1xy * In this case, the hardware has overcounted the number of
080575042aba2197b425ebfd52061dea061a9aa1xy * oversize frames.
080575042aba2197b425ebfd52061dea061a9aa1xy * Adjust the bin counters when the extra byte put the frame in the
25f2d433de915875c8393f0b0dc14aa155997ad0xy * wrong bin. Remember that the frame_len was adjusted above.
25f2d433de915875c8393f0b0dc14aa155997ad0xy * e1000g_update_stats - update driver private kstat counters
25f2d433de915875c8393f0b0dc14aa155997ad0xy * This routine will dump and reset the e1000's internal
25f2d433de915875c8393f0b0dc14aa155997ad0xy * statistics counters. The current stats dump values will
25f2d433de915875c8393f0b0dc14aa155997ad0xy * be sent to the kernel status area.
57ef6f696a98dddd9434e80a654341edd5316bf1guoqing zhu - Sun Microsystems - Beijing China#ifdef E1000G_DEBUG
57ef6f696a98dddd9434e80a654341edd5316bf1guoqing zhu - Sun Microsystems - Beijing China#ifdef E1000G_DEBUG
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->rx_allocb_fail.value.ul = rx_ring->stat_allocb_fail;
46ebaa55cce1df60528a191312d12199d38a4493Miles Xu, Sun Microsystems e1000g_ksp->rx_size_error.value.ul = rx_ring->stat_size_error;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->tx_no_swpkt.value.ul = tx_ring->stat_no_swpkt;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->tx_send_fail.value.ul = tx_ring->stat_send_fail;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->tx_reschedule.value.ul = tx_ring->stat_reschedule;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->tx_over_size.value.ul = tx_ring->stat_over_size;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->rx_multi_desc.value.ul = rx_ring->stat_multi_desc;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->rx_no_freepkt.value.ul = rx_ring->stat_no_freepkt;
54e0d7a5e8285a3f01a0db8db1246ac7cac94d81Miles Xu, Sun Microsystems e1000g_ksp->rx_avail_freepkt.value.ul = rx_data->avail_freepkt;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->tx_under_size.value.ul = tx_ring->stat_under_size;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->tx_exceed_frags.value.ul = tx_ring->stat_exceed_frags;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->tx_empty_frags.value.ul = tx_ring->stat_empty_frags;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->tx_recycle_intr.value.ul = tx_ring->stat_recycle_intr;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->tx_recycle_retry.value.ul = tx_ring->stat_recycle_retry;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->tx_recycle_none.value.ul = tx_ring->stat_recycle_none;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->tx_multi_copy.value.ul = tx_ring->stat_multi_copy;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->tx_multi_cookie.value.ul = tx_ring->stat_multi_cookie;
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->tx_lack_desc.value.ul = tx_ring->stat_lack_desc;
080575042aba2197b425ebfd52061dea061a9aa1xy * Standard Stats
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->Mpc.value.ul += E1000_READ_REG(hw, E1000_MPC);
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->Rlec.value.ul += E1000_READ_REG(hw, E1000_RLEC);
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->Xonrxc.value.ul += E1000_READ_REG(hw, E1000_XONRXC);
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->Xontxc.value.ul += E1000_READ_REG(hw, E1000_XONTXC);
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->Xoffrxc.value.ul += E1000_READ_REG(hw, E1000_XOFFRXC);
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->Xofftxc.value.ul += E1000_READ_REG(hw, E1000_XOFFTXC);
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->Fcruc.value.ul += E1000_READ_REG(hw, E1000_FCRUC);
4d7379630d53d9992780329b674af8c85935e858xiangtao you - Sun Microsystems - Beijing China (hw->mac.type != e1000_ich9lan) &&
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (hw->mac.type != e1000_ich10lan) &&
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (hw->mac.type != e1000_pchlan)) {
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->Gprc.value.ul += E1000_READ_REG(hw, E1000_GPRC);
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->Gptc.value.ul += E1000_READ_REG(hw, E1000_GPTC);
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->Rfc.value.ul += E1000_READ_REG(hw, E1000_RFC);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems e1000g_ksp->Tncrs.value.ul += e1000g_read_phy_stat(hw, E1000_TNCRS);
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->Tsctc.value.ul += E1000_READ_REG(hw, E1000_TSCTC);
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp->Tsctfc.value.ul += E1000_READ_REG(hw, E1000_TSCTFC);
25f2d433de915875c8393f0b0dc14aa155997ad0xy * Adaptive Calculations
080575042aba2197b425ebfd52061dea061a9aa1xy * The 64-bit register will reset whenever the upper
080575042aba2197b425ebfd52061dea061a9aa1xy * 32 bits are read. So we need to read the lower
080575042aba2197b425ebfd52061dea061a9aa1xy * 32 bits first, then read the upper 32 bits.
ec39b9cf9a38586835b89f8cc2150710071adce3changqing li - Sun Microsystems - Beijing China if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
9b6541b318d01d0d83bfb98699a7f09e35f37951gl ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED);
ec39b9cf9a38586835b89f8cc2150710071adce3changqing li - Sun Microsystems - Beijing China return (EIO);
080575042aba2197b425ebfd52061dea061a9aa1xy return (0);
25f2d433de915875c8393f0b0dc14aa155997ad0xy e1000g_ksp = (p_e1000g_stat_t)Adapter->e1000g_ksp->ks_data;
d5c3073dbbd835e1e9b7dca0c6c770cf3cc20afachenlu chen - Sun Microsystems - Beijing China if (Adapter->e1000g_state & E1000G_SUSPENDED) {
d5c3073dbbd835e1e9b7dca0c6c770cf3cc20afachenlu chen - Sun Microsystems - Beijing China rw_exit(&Adapter->chip_lock);
d5c3073dbbd835e1e9b7dca0c6c770cf3cc20afachenlu chen - Sun Microsystems - Beijing China return (ECANCELED);
080575042aba2197b425ebfd52061dea061a9aa1xy switch (stat) {
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_ECOL);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_COLC);
080575042aba2197b425ebfd52061dea061a9aa1xy * The 64-bit register will reset whenever the upper
080575042aba2197b425ebfd52061dea061a9aa1xy * 32 bits are read. So we need to read the lower
080575042aba2197b425ebfd52061dea061a9aa1xy * 32 bits first, then read the upper 32 bits.
080575042aba2197b425ebfd52061dea061a9aa1xy * The 64-bit register will reset whenever the upper
080575042aba2197b425ebfd52061dea061a9aa1xy * 32 bits are read. So we need to read the lower
080575042aba2197b425ebfd52061dea061a9aa1xy * 32 bits first, then read the upper 32 bits.
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_ECOL);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_LATECOL);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_DC);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_SCC);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_MCC);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_ECOL);
080575042aba2197b425ebfd52061dea061a9aa1xy /* The Internal PHY's MDI address for each MAC is 1 */
ec39b9cf9a38586835b89f8cc2150710071adce3changqing li - Sun Microsystems - Beijing China if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
9b6541b318d01d0d83bfb98699a7f09e35f37951gl ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED);
ec39b9cf9a38586835b89f8cc2150710071adce3changqing li - Sun Microsystems - Beijing China return (EIO);
080575042aba2197b425ebfd52061dea061a9aa1xy return (0);
25f2d433de915875c8393f0b0dc14aa155997ad0xy * e1000g_init_stats - initialize kstat data structures
25f2d433de915875c8393f0b0dc14aa155997ad0xy * This routine will create and initialize the driver private
25f2d433de915875c8393f0b0dc14aa155997ad0xy * statistics counters.
080575042aba2197b425ebfd52061dea061a9aa1xy * Create and init kstat
080575042aba2197b425ebfd52061dea061a9aa1xy ksp = kstat_create(WSNAME, ddi_get_instance(Adapter->dip),
080575042aba2197b425ebfd52061dea061a9aa1xy "Could not create kernel statistics\n");
080575042aba2197b425ebfd52061dea061a9aa1xy Adapter->e1000g_ksp = ksp; /* Fill in the Adapters ksp */
080575042aba2197b425ebfd52061dea061a9aa1xy * Initialize all the statistics
25f2d433de915875c8393f0b0dc14aa155997ad0xy kstat_named_init(&e1000g_ksp->reset_count, "Reset Count",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->rx_allocb_fail, "Rx Allocb Failure",
46ebaa55cce1df60528a191312d12199d38a4493Miles Xu, Sun Microsystems kstat_named_init(&e1000g_ksp->rx_size_error, "Rx Size Error",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->tx_no_swpkt, "Tx No Buffer",
25f2d433de915875c8393f0b0dc14aa155997ad0xy kstat_named_init(&e1000g_ksp->tx_send_fail, "Tx Send Failure",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->tx_over_size, "Tx Pkt Over Size",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->tx_reschedule, "Tx Reschedule",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Mpc, "Recv_Missed_Packets",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Symerrs, "Recv_Symbol_Errors",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Rlec, "Recv_Length_Errors",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Fcruc, "Recv_Unsupport_FC_Pkts",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Prc64, "Pkts_Recvd_( 64b)",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Prc127, "Pkts_Recvd_( 65- 127b)",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Prc255, "Pkts_Recvd_( 127- 255b)",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Prc511, "Pkts_Recvd_( 256- 511b)",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Prc1023, "Pkts_Recvd_( 511-1023b)",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Prc1522, "Pkts_Recvd_(1024-1522b)",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Gorl, "Good_Octets_Recvd_Lo",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Gorh, "Good_Octets_Recvd_Hi",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Gotl, "Good_Octets_Xmitd_Lo",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Goth, "Good_Octets_Xmitd_Hi",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Ptc64, "Pkts_Xmitd_( 64b)",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Ptc127, "Pkts_Xmitd_( 65- 127b)",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Ptc255, "Pkts_Xmitd_( 128- 255b)",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Ptc511, "Pkts_Xmitd_( 255- 511b)",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Ptc1023, "Pkts_Xmitd_( 512-1023b)",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Ptc1522, "Pkts_Xmitd_(1024-1522b)",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Tsctc, "Xmit_TCP_Seg_Contexts",
080575042aba2197b425ebfd52061dea061a9aa1xy kstat_named_init(&e1000g_ksp->Tsctfc, "Xmit_TCP_Seg_Contexts_Fail",
25f2d433de915875c8393f0b0dc14aa155997ad0xy kstat_named_init(&e1000g_ksp->rx_multi_desc, "Rx Span Multi Desc",
25f2d433de915875c8393f0b0dc14aa155997ad0xy kstat_named_init(&e1000g_ksp->rx_no_freepkt, "Rx Freelist Empty",
25f2d433de915875c8393f0b0dc14aa155997ad0xy kstat_named_init(&e1000g_ksp->rx_avail_freepkt, "Rx Freelist Avail",
25f2d433de915875c8393f0b0dc14aa155997ad0xy kstat_named_init(&e1000g_ksp->tx_under_size, "Tx Pkt Under Size",
25f2d433de915875c8393f0b0dc14aa155997ad0xy kstat_named_init(&e1000g_ksp->tx_exceed_frags, "Tx Exceed Max Frags",
25f2d433de915875c8393f0b0dc14aa155997ad0xy kstat_named_init(&e1000g_ksp->tx_empty_frags, "Tx Empty Frags",
25f2d433de915875c8393f0b0dc14aa155997ad0xy kstat_named_init(&e1000g_ksp->tx_recycle_intr, "Tx Recycle Intr",
25f2d433de915875c8393f0b0dc14aa155997ad0xy kstat_named_init(&e1000g_ksp->tx_recycle_retry, "Tx Recycle Retry",
25f2d433de915875c8393f0b0dc14aa155997ad0xy kstat_named_init(&e1000g_ksp->tx_recycle_none, "Tx Recycled None",
25f2d433de915875c8393f0b0dc14aa155997ad0xy kstat_named_init(&e1000g_ksp->tx_multi_copy, "Tx Copy Multi Frags",
25f2d433de915875c8393f0b0dc14aa155997ad0xy kstat_named_init(&e1000g_ksp->tx_multi_cookie, "Tx Bind Multi Cookies",
25f2d433de915875c8393f0b0dc14aa155997ad0xy kstat_named_init(&e1000g_ksp->tx_lack_desc, "Tx Desc Insufficient",
080575042aba2197b425ebfd52061dea061a9aa1xy * Function to provide kernel stat update on demand
080575042aba2197b425ebfd52061dea061a9aa1xy * Pointer into provider's raw statistics
080575042aba2197b425ebfd52061dea061a9aa1xy * Add kstat to systems kstat chain
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems * e1000g_read_phy_stat - read certain PHY statistics
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems * Certain statistics are read from MAC registers on some silicon types
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems * but are read from the PHY on other silicon types. This routine
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems * handles that difference as needed.
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystemse1000g_read_phy_stat(struct e1000_hw *hw, int reg)
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems /* get statistic from PHY in these cases */
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems if ((hw->phy.type == e1000_phy_82578) ||
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (hw->phy.type == e1000_phy_82577)) {
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_SCC_UPPER, &phy_high);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_SCC_LOWER, &phy_low);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems val = ((uint32_t)phy_high << 16) | (uint32_t)phy_low;
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_MCC_UPPER, &phy_high);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_MCC_LOWER, &phy_low);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems val = ((uint32_t)phy_high << 16) | (uint32_t)phy_low;
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_ECOL_UPPER, &phy_high);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_ECOL_LOWER, &phy_low);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems val = ((uint32_t)phy_high << 16) | (uint32_t)phy_low;
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_COLC_UPPER, &phy_high);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_COLC_LOWER, &phy_low);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems val = ((uint32_t)phy_high << 16) | (uint32_t)phy_low;
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_LATECOL_UPPER,
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_LATECOL_LOWER,
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems val = ((uint32_t)phy_high << 16) | (uint32_t)phy_low;
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_DC_UPPER, &phy_high);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_DC_LOWER, &phy_low);
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems val = ((uint32_t)phy_high << 16) | (uint32_t)phy_low;
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_TNCRS_UPPER,
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_TNCRS_LOWER,
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems val = ((uint32_t)phy_high << 16) | (uint32_t)phy_low;
caf05df5c10c960028f122b1b02a3f7d8f892c31Miles Xu, Sun Microsystems /* get statistic from MAC otherwise */
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer * Retrieve a value for one of the statistics for a particular rx ring
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyere1000g_rx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer e1000g_rx_ring_t *rx_ring = (e1000g_rx_ring_t *)rh;
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer if (Adapter->e1000g_state & E1000G_SUSPENDED) {
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer * The 64-bit register will reset whenever the upper
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer * 32 bits are read. So we need to read the lower
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer * 32 bits first, then read the upper 32 bits.
0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK)