e1000g_alloc.c revision 57ef6f696a98dddd9434e80a654341edd5316bf1
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * This file is provided under a CDDLv1 license. When using or
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * redistributing this file, you may do so under this license.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * In redistributing this file this license must be included
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * and no other modification of this header file is permitted.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * CDDL LICENSE SUMMARY
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * The contents of this file are subject to the terms of Version
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * 1.0 of the Common Development and Distribution License (the "License").
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * You should have received a copy of the License with this software.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * You can obtain a copy of the License at
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * See the License for the specific language governing permissions
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * and limitations under the License.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Use is subject to license terms of the CDDLv1.
68c47f65208790c466e5e484f2293d3baed71c6aGarrett D'Amore * **********************************************************************
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Module Name: *
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Abstract: *
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * This file contains some routines that take care of *
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * memory allocation for descriptors and buffers. *
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * **********************************************************************
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (sizeof (tx_sw_packet_t) * Adapter->tx_freelist_num)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic int e1000g_alloc_tx_descriptors(e1000g_tx_ring_t *);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic int e1000g_alloc_rx_descriptors(e1000g_rx_data_t *);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic void e1000g_free_tx_descriptors(e1000g_tx_ring_t *);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic void e1000g_free_rx_descriptors(e1000g_rx_data_t *);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic int e1000g_alloc_tx_packets(e1000g_tx_ring_t *);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic int e1000g_alloc_rx_packets(e1000g_rx_data_t *);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic void e1000g_free_tx_packets(e1000g_tx_ring_t *);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic void e1000g_free_rx_packets(e1000g_rx_data_t *);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic int e1000g_alloc_dma_buffer(struct e1000g *,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore dma_buffer_t *, size_t, ddi_dma_attr_t *p_dma_attr);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * In order to avoid address error crossing 64KB boundary
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * during PCI-X packets receving, e1000g_alloc_dma_buffer_82546
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * is used by some necessary adapter types.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic int e1000g_alloc_dma_buffer_82546(struct e1000g *,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore dma_buffer_t *, size_t, ddi_dma_attr_t *p_dma_attr);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic int e1000g_dma_mem_alloc_82546(dma_buffer_t *buf,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic boolean_t e1000g_cross_64k_bound(void *, uintptr_t);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic void e1000g_free_dma_buffer(dma_buffer_t *);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic int e1000g_alloc_dvma_buffer(struct e1000g *, dma_buffer_t *, size_t);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic void e1000g_free_dvma_buffer(dma_buffer_t *);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic int e1000g_alloc_descriptors(struct e1000g *Adapter);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic void e1000g_free_descriptors(struct e1000g *Adapter);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic int e1000g_alloc_packets(struct e1000g *Adapter);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic void e1000g_free_packets(struct e1000g *Adapter);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic p_rx_sw_packet_t e1000g_alloc_rx_sw_packet(e1000g_rx_data_t *,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore/* DMA access attributes for descriptors <Little Endian> */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic ddi_device_acc_attr_t e1000g_desc_acc_attr = {
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore/* DMA access attributes for DMA buffers */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic ddi_device_acc_attr_t e1000g_buf_acc_attr = {
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic ddi_device_acc_attr_t e1000g_buf_acc_attr = {
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore/* DMA attributes for tx mblk buffers */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore DMA_ATTR_V0, /* version of this structure */
68c47f65208790c466e5e484f2293d3baed71c6aGarrett D'Amore 0, /* lowest usable address */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore 0xffffffffffffffffULL, /* highest usable address */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore 0x7fffffff, /* maximum DMAable byte count */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore 0xffffffffffffffffULL, /* maximum segment length */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore MAX_COOKIES, /* maximum number of segments */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore/* DMA attributes for pre-allocated rx/tx buffers */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic ddi_dma_attr_t e1000g_buf_dma_attr = {
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore DMA_ATTR_V0, /* version of this structure */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore 0, /* lowest usable address */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore 0xffffffffffffffffULL, /* highest usable address */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore 0x7fffffff, /* maximum DMAable byte count */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore 0xffffffffffffffffULL, /* maximum segment length */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore/* DMA attributes for rx/tx descriptors */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic ddi_dma_attr_t e1000g_desc_dma_attr = {
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore DMA_ATTR_V0, /* version of this structure */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore 0, /* lowest usable address */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore 0xffffffffffffffffULL, /* highest usable address */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore 0x7fffffff, /* maximum DMAable byte count */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000_MDALIGN, /* default alignment is 4k but can be changed */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore 0xffffffffffffffffULL, /* maximum segment length */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (uint_t)0xfc00fc, /* dlim_burstsizes for 32 and 64 bit xfers */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amorestatic dma_type_t e1000g_dma_type = USE_DVMA;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_alloc_dma_resources(struct e1000g *Adapter)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (Adapter->tx_desc_num >= MIN_NUM_TX_DESCRIPTOR) &&
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (Adapter->rx_desc_num >= MIN_NUM_RX_DESCRIPTOR) &&
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (Adapter->tx_freelist_num >= MIN_NUM_TX_FREELIST) &&
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (Adapter->rx_freelist_num >= MIN_NUM_RX_FREELIST)) {
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * If the allocation fails due to resource shortage,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * we'll reduce the numbers of descriptors/buffers by
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * half, and try the allocation again.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * We must ensure the number of descriptors
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * is always a multiple of 8.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * e1000g_alloc_descriptors - allocate DMA buffers for descriptors
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * This routine allocates neccesary DMA buffers for
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Transmit Descriptor Area
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Receive Descrpitor Area
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_alloc_descriptors(struct e1000g *Adapter)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ((Adapter->shared.mac.type == e1000_82545) ||
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (Adapter->shared.mac.type == e1000_82546) ||
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (Adapter->shared.mac.type == e1000_82546_rev_3))) {
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore /* Align on a 64k boundary for these adapter types */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore /* Align on a 4k boundary for all other adapter types */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore result = e1000g_alloc_tx_descriptors(tx_ring);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore result = e1000g_alloc_rx_descriptors(rx_data);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_free_descriptors(struct e1000g *Adapter)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_alloc_tx_descriptors(e1000g_tx_ring_t *tx_ring)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Solaris 7 has a problem with allocating physically contiguous memory
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * that is aligned on a 4K boundary. The transmit and rx descriptors
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * need to aligned on a 4kbyte boundary. We first try to allocate the
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * memory with DMA attributes set to 4K alignment and also no scatter/
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * gather mechanism specified. In most cases, this does not allocate
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * memory aligned at a 4Kbyte boundary. We then try asking for memory
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * aligned on 4K boundary with scatter/gather set to 2. This works when
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * the amount of memory is less than 4k i.e a page size. If neither of
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * these options work or if the number of descriptors is greater than
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * 4K, ie more than 256 descriptors, we allocate 4k extra memory and
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * and then align the memory at a 4k boundary.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore size = sizeof (struct e1000_tx_desc) * Adapter->tx_desc_num;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Memory allocation for the transmit buffer descriptors.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore dma_attr.dma_attr_align = Adapter->desc_align;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Allocate a new DMA handle for the transmit descriptor
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * memory area.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore mystat = ddi_dma_alloc_handle(devinfo, &dma_attr,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not allocate tbd dma handle: %d", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Allocate memory to DMA data to and from the transmit
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * descriptors.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore mystat = ddi_dma_mem_alloc(tx_ring->tbd_dma_handle,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ((uintptr_t)tx_ring->tbd_area & (Adapter->desc_align - 1))) {
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ddi_dma_free_handle(&tx_ring->tbd_dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Initialize the entire transmit buffer descriptor area to zero
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * If the previous DMA attributes setting could not give us contiguous
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * memory or the number of descriptors is greater than the page size,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * we allocate extra memory and then align it at appropriate boundary.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * DMA attributes set to no scatter/gather and 16 bit alignment
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Allocate a new DMA handle for the transmit descriptor memory
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore mystat = ddi_dma_alloc_handle(devinfo, &dma_attr,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not re-allocate tbd dma handle: %d", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Allocate memory to DMA data to and from the transmit
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * descriptors.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore mystat = ddi_dma_mem_alloc(tx_ring->tbd_dma_handle,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not allocate tbd dma memory: %d", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ddi_dma_free_handle(&tx_ring->tbd_dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Initialize the entire transmit buffer descriptor area to zero
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Memory has been allocated with the ddi_dma_mem_alloc call,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * but has not been aligned.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * We now align it on the appropriate boundary.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore templong = P2NPHASE((uintptr_t)tx_ring->tbd_area,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore tx_ring->tbd_area = (struct e1000_tx_desc *)templong;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore } /* alignment workaround */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Transmit buffer descriptor memory allocation succeeded
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Allocates DMA resources for the memory that was allocated by
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * the ddi_dma_mem_alloc call. The DMA resources then get bound to the
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * the memory address
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore mystat = ddi_dma_addr_bind_handle(tx_ring->tbd_dma_handle,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (struct as *)NULL, (caddr_t)tx_ring->tbd_area,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore DDI_DMA_DONTWAIT, 0, &cookie, &cookie_count);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not bind tbd dma resource: %d", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ddi_dma_free_handle(&tx_ring->tbd_dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_2(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not bind tbd dma resource in a single frag. "
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore tx_ring->tbd_dma_addr = cookie.dmac_laddress;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_alloc_rx_descriptors(e1000g_rx_data_t *rx_data)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Memory allocation for the receive buffer descriptors.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore size = (sizeof (struct e1000_rx_desc)) * Adapter->rx_desc_num;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Asking for aligned memory with DMA attributes set for suitable value
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore dma_attr.dma_attr_align = Adapter->desc_align;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Allocate a new DMA handle for the receive descriptors
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore mystat = ddi_dma_alloc_handle(devinfo, &dma_attr,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not allocate rbd dma handle: %d", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Allocate memory to DMA data to and from the receive
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * descriptors.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore mystat = ddi_dma_mem_alloc(rx_data->rbd_dma_handle,
68c47f65208790c466e5e484f2293d3baed71c6aGarrett D'Amore * Check if memory allocation succeeded and also if the
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * allocated memory is aligned correctly.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ((uintptr_t)rx_data->rbd_area & (Adapter->desc_align - 1))) {
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ddi_dma_free_handle(&rx_data->rbd_dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Initialize the allocated receive descriptor memory to zero.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * If memory allocation did not succeed, do the alignment ourselves
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Allocate a new DMA handle for the receive descriptor.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore mystat = ddi_dma_alloc_handle(devinfo, &dma_attr,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not re-allocate rbd dma handle: %d", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Allocate memory to DMA data to and from the receive
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * descriptors.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore mystat = ddi_dma_mem_alloc(rx_data->rbd_dma_handle,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not allocate rbd dma memory: %d", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ddi_dma_free_handle(&rx_data->rbd_dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Initialize the allocated receive descriptor memory to zero.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore templong = P2NPHASE((uintptr_t)rx_data->rbd_area,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore rx_data->rbd_area = (struct e1000_rx_desc *)templong;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore } /* alignment workaround */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * The memory allocation of the receive descriptors succeeded
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Allocates DMA resources for the memory that was allocated by
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * the ddi_dma_mem_alloc call.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore mystat = ddi_dma_addr_bind_handle(rx_data->rbd_dma_handle,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (struct as *)NULL, (caddr_t)rx_data->rbd_area,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore DDI_DMA_DONTWAIT, 0, &cookie, &cookie_count);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not bind rbd dma resource: %d", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ddi_dma_free_handle(&rx_data->rbd_dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_2(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not bind rbd dma resource in a single frag. "
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore rx_data->rbd_dma_addr = cookie.dmac_laddress;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_free_rx_descriptors(e1000g_rx_data_t *rx_data)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (void) ddi_dma_unbind_handle(rx_data->rbd_dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ddi_dma_free_handle(&rx_data->rbd_dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_free_tx_descriptors(e1000g_tx_ring_t *tx_ring)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (void) ddi_dma_unbind_handle(tx_ring->tbd_dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ddi_dma_free_handle(&tx_ring->tbd_dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * e1000g_alloc_packets - allocate DMA buffers for rx/tx
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * This routine allocates neccesary buffers for
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Transmit sw packet structure
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * DMA handle for Transmit
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * DMA buffer for Transmit
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Receive sw packet structure
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * DMA buffer for Receive
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "No enough dvma resource for Tx packets, "
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "trying to allocate dma buffers...\n");
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_0(Adapter, E1000G_WARN_LEVEL,
68c47f65208790c466e5e484f2293d3baed71c6aGarrett D'Amore "Failed to allocate dma buffers for Tx packets\n");
68c47f65208790c466e5e484f2293d3baed71c6aGarrett D'Amore E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL,
68c47f65208790c466e5e484f2293d3baed71c6aGarrett D'Amore "No enough dvma resource for Rx packets, "
68c47f65208790c466e5e484f2293d3baed71c6aGarrett D'Amore "trying to allocate dma buffers...\n");
68c47f65208790c466e5e484f2293d3baed71c6aGarrett D'Amore E1000G_DEBUGLOG_0(Adapter, E1000G_WARN_LEVEL,
68c47f65208790c466e5e484f2293d3baed71c6aGarrett D'Amore "Failed to allocate dma buffers for Rx packets\n");
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_alloc_dvma_buffer(struct e1000g *Adapter,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not allocate dvma buffer handle: %d\n", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore buf->address = kmem_alloc(size, KM_NOSLEEP);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_0(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not allocate dvma buffer memory\n");
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_alloc_dma_buffer(struct e1000g *Adapter,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore dma_buffer_t *buf, size_t size, ddi_dma_attr_t *p_dma_attr)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not allocate dma buffer handle: %d\n", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore size, &e1000g_buf_acc_attr, DDI_DMA_STREAMING,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not allocate dma buffer memory: %d\n", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore mystat = ddi_dma_addr_bind_handle(buf->dma_handle,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not bind buffer dma handle: %d\n", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (void) ddi_dma_unbind_handle(buf->dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not bind buffer as a single frag. "
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * e1000g_alloc_dma_buffer_82546 - allocate a dma buffer along with all
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * necessary handles. Same as e1000g_alloc_dma_buffer() except ensure
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * that buffer that doesn't cross a 64k boundary.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_alloc_dma_buffer_82546(struct e1000g *Adapter,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore dma_buffer_t *buf, size_t size, ddi_dma_attr_t *p_dma_attr)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not allocate dma buffer handle: %d\n", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore mystat = e1000g_dma_mem_alloc_82546(buf, size, &len);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not allocate dma buffer memory: %d\n", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore mystat = ddi_dma_addr_bind_handle(buf->dma_handle,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not bind buffer dma handle: %d\n", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (void) ddi_dma_unbind_handle(buf->dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
68c47f65208790c466e5e484f2293d3baed71c6aGarrett D'Amore "Could not bind buffer as a single frag. "
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * e1000g_dma_mem_alloc_82546 - allocate a dma buffer, making up to
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * ALLOC_RETRY attempts to get a buffer that doesn't cross a 64k boundary.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_dma_mem_alloc_82546(dma_buffer_t *buf, size_t size, size_t *len)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore /* allocate memory */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore stat = ddi_dma_mem_alloc(buf->dma_handle, size,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore &e1000g_buf_acc_attr, DDI_DMA_STREAMING, DDI_DMA_DONTWAIT,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Check 64k bounday:
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * if it is bad, hold it and retry
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * if it is good, exit loop
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore if (e1000g_cross_64k_bound(buf->address, *len)) {
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore /* Release any held buffers crossing 64k bounday */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * e1000g_cross_64k_bound - If starting and ending address cross a 64k boundary
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * return true; otherwise return false
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_cross_64k_bound(void *addr, uintptr_t len)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore return (((start ^ end) >> 16) == 0 ? B_FALSE : B_TRUE);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (void) ddi_dma_unbind_handle(buf->dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_alloc_tx_packets(e1000g_tx_ring_t *tx_ring)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Memory allocation for the Transmit software structure, the transmit
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * software packet. This structure stores all the relevant information
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * for transmitting a single packet.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore j < Adapter->tx_freelist_num; j++, packet++) {
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Pre-allocate dma handles for transmit. These dma handles
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * will be dynamically bound to the data buffers passed down
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * from the upper layers at the time of transmitting. The
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * dynamic binding only applies for the packets that are larger
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * than the tx_bcopy_thresh.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_1(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Could not allocate tx dma handle: %d\n", mystat);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Pre-allocate transmit buffers for small packets that the
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * size is less than tx_bcopy_thresh. The data of those small
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * packets will be bcopy() to the transmit buffers instead of
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * using dynamical DMA binding. For small packets, bcopy will
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * bring better performance than DMA binding.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore tx_buf, Adapter->tx_buffer_size, &dma_attr);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ddi_dma_free_handle(&packet->tx_dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_0(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Allocate Tx buffer fail\n");
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_alloc_rx_packets(e1000g_rx_data_t *rx_data)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore dma_attr.dma_attr_align = Adapter->rx_buf_align;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * Allocate memory for the rx_sw_packet structures. Each one of these
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * structures will contain a virtual and physical address to an actual
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * receive buffer in host memory. Since we use one rx_sw_packet per
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * received packet, the maximum number of rx_sw_packet that we'll
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * need is equal to the number of receive descriptors plus the freelist
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore packet_num = Adapter->rx_desc_num + Adapter->rx_freelist_num;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore for (i = 0; i < packet_num; i++) {
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore packet = e1000g_alloc_rx_sw_packet(rx_data, &dma_attr);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_alloc_rx_sw_packet(e1000g_rx_data_t *rx_data, ddi_dma_attr_t *p_dma_attr)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore packet = kmem_zalloc(sizeof (rx_sw_packet_t), KM_NOSLEEP);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_0(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Cound not allocate memory for Rx SwPacket\n");
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ((Adapter->shared.mac.type == e1000_82545) ||
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (Adapter->shared.mac.type == e1000_82546) ||
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore (Adapter->shared.mac.type == e1000_82546_rev_3))) {
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore mystat = e1000g_alloc_dma_buffer_82546(Adapter,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore rx_buf, Adapter->rx_buffer_size, p_dma_attr);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore rx_buf, Adapter->rx_buffer_size, p_dma_attr);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore E1000G_DEBUGLOG_0(Adapter, E1000G_WARN_LEVEL,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore "Failed to allocate Rx buffer\n");
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore packet->free_rtn.free_func = e1000g_rxfree_func;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * esballoc is changed to desballoc which
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * is undocumented call but as per sun,
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * we can use it. It gives better efficiency.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_free_rx_sw_packet(p_rx_sw_packet_t packet, boolean_t full_release)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_free_rx_packets(e1000g_rx_data_t *rx_data)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ref_cnt = atomic_dec_32_nv(&packet->ref_cnt);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_free_tx_packets(e1000g_tx_ring_t *tx_ring)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore j < Adapter->tx_freelist_num; j++, packet++) {
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore /* Free the Tx DMA handle for dynamical binding */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore ddi_dma_free_handle(&packet->tx_dma_handle);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * If the dma handle is NULL, then we don't
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * need to check the packets left. For they
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * have not been initialized or have been freed.
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore kmem_free(tx_ring->packet_area, TX_SW_PKT_AREA_SZ);
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * e1000g_release_dma_resources - release allocated DMA resources
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * This function releases any pending buffers that has been
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore * previously allocated
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_release_dma_resources(struct e1000g *Adapter)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore/* ARGSUSED */
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amoree1000g_set_fma_flags(struct e1000g *Adapter, int acc_flag, int dma_flag)
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore e1000g_desc_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore e1000g_desc_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore e1000g_tx_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
7a4f122cf63a91c2888629e433b5f5ee7536a802Garrett D'Amore e1000g_buf_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;