e1000_osdep.h revision 080575042aba2197b425ebfd52061dea061a9aa1
/*
* This file is provided under a CDDLv1 license. When using or
* redistributing this file, you may do so under this license.
* In redistributing this file this license must be included
* and no other modification of this header file is permitted.
*
* CDDL LICENSE SUMMARY
*
* Copyright(c) 1999 - 2007 Intel Corporation. All rights reserved.
*
* The contents of this file are subject to the terms of Version
* 1.0 of the Common Development and Distribution License (the "License").
*
* You should have received a copy of the License with this software.
* You can obtain a copy of the License at
* See the License for the specific language governing permissions
* and limitations under the License.
*/
/*
* Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms of the CDDLv1.
*/
#ifndef _E1000_OSDEP_H
#define _E1000_OSDEP_H
#pragma ident "%Z%%M% %I% %E% SMI"
#ifdef __cplusplus
extern "C" {
#endif
/*
* === BEGIN CONTENT FORMERLY IN FXHW.H ===
*/
#define DelayInMicroseconds(x) drv_usecwait(x)
#define usec_delay(x) drv_usecwait(x)
#ifdef e1000g_DEBUG
#define DEBUGOUT7(S, A, B, C, D, E, F, G) \
#else
#define DEBUGOUT(S)
#define DEBUGOUT1(S, A)
#define DEBUGOUT2(S, A, B)
#define DEBUGOUT3(S, A, B, C)
#define DEBUGOUT7(S, A, B, C, D, E, F, G)
#endif
#define IN
#define OUT
#define FALSE 0
#define TRUE 1
#define PCI_COMMAND_REGISTER 0x04
#define E1000_WRITE_FLUSH(a) /* NOOP */
{\
if ((a)->mac_type >= e1000_82543) \
value); \
else \
value); \
}
#define E1000_READ_REG(a, reg) (\
((a)->mac_type >= e1000_82543) ? \
{\
if ((a)->mac_type >= e1000_82543) \
value); \
else \
}
((a)->mac_type >= e1000_82543) ? \
((offset) << 2))))
/*
* The size of the receive buffers we allocate,
*/
#define E1000_SIZE_OF_RECEIVE_BUFFERS (2048)
/*
* Use this define refer to the size of a recieve buffer plus its
* align size
*/
#define E1000_SIZE_OF_UNALIGNED_RECEIVE_BUFFERS \
/*
* === END CONTENT FORMERLY IN FXHW.H ===
*/
#define msec_delay_irq msec_delay
typedef ULONG NDIS_STATUS;
typedef ULONG E1000_32_BIT_PHYSICAL_ADDRESS,
typedef uint64_t E1000_64_BIT_PHYSICAL_ADDRESS,
struct e1000g_osdep {
/* flash access */
};
#ifdef __sparc /* on SPARC, use only memory-mapped routines */
#define E1000_READ_REG_IO E1000_READ_REG
#define E1000_WRITE_REG_IO E1000_WRITE_REG
#else /* on x86, use port io routines */
#define E1000_READ_REG_IO(a, reg) \
#endif /* __sparc */
#ifdef __cplusplus
}
#endif
#endif /* _E1000_OSDEP_H */