e1000_osdep.c revision 4d7379630d53d9992780329b674af8c85935e858
/*
* This file is provided under a CDDLv1 license. When using or
* redistributing this file, you may do so under this license.
* In redistributing this file this license must be included
* and no other modification of this header file is permitted.
*
* CDDL LICENSE SUMMARY
*
* Copyright(c) 1999 - 2008 Intel Corporation. All rights reserved.
*
* The contents of this file are subject to the terms of Version
* 1.0 of the Common Development and Distribution License (the "License").
*
* You should have received a copy of the License with this software.
* You can obtain a copy of the License at
* See the License for the specific language governing permissions
* and limitations under the License.
*/
/*
* Copyright 2008 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms of the CDDLv1.
*/
#include "e1000_osdep.h"
#include "e1000_api.h"
{
return (E1000_SUCCESS);
}
void
{
return;
}
void
{
}
void
{
}
void
{
}
void
{
*value =
}
/*
* phy_spd_state - set smart-power-down (SPD) state
*
* This only acts on the 82541/47 family and the 82571/72 family.
* For any others, return without doing anything.
*/
void
{
case e1000_82541:
case e1000_82547:
case e1000_82541_rev_2:
case e1000_82547_rev_2:
break;
case e1000_82571:
case e1000_82572:
break;
default:
return; /* no action */
}
if (enable)
else
}
/*
* The real intent of this routine is to return the value from pci-e
* config space at offset reg into the capability space.
* ICH devices are "PCI Express"-ish. They have a configuration space,
* but do not contain PCI Express Capability registers, so this returns
* the equivalent of "not supported"
*/
{
PCI_EX_CONF_CAP + reg);
return (0);
}
/*
* Enables PCI-Express master access.
*
* hw: Struct containing variables accessed by shared code
*
* returns: - none.
*/
void
{
return;
}