e1000_82571.c revision caf05df5c10c960028f122b1b02a3f7d8f892c31
/*
* This file is provided under a CDDLv1 license. When using or
* redistributing this file, you may do so under this license.
* In redistributing this file this license must be included
* and no other modification of this header file is permitted.
*
* CDDL LICENSE SUMMARY
*
* Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
*
* The contents of this file are subject to the terms of Version
* 1.0 of the Common Development and Distribution License (the "License").
*
* You should have received a copy of the License with this software.
* You can obtain a copy of the License at
* See the License for the specific language governing permissions
* and limitations under the License.
*/
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms of the CDDLv1.
*/
/*
* IntelVersion: 1.113 v3-1-3_2009-8-20
*/
/*
* 82571EB Gigabit Ethernet Controller
* 82571EB Gigabit Ethernet Controller (Copper)
* 82571EB Gigabit Ethernet Controller (Fiber)
* 82571EB Dual Port Gigabit Mezzanine Adapter
* 82571EB Quad Port Gigabit Mezzanine Adapter
* 82571PT Gigabit PT Quad Port Server ExpressModule
* 82572EI Gigabit Ethernet Controller (Copper)
* 82572EI Gigabit Ethernet Controller (Fiber)
* 82572EI Gigabit Ethernet Controller
* 82573V Gigabit Ethernet Controller (Copper)
* 82573E Gigabit Ethernet Controller (Copper)
* 82573L Gigabit Ethernet Controller
* 82574L Gigabit Network Connection
* 82583V Gigabit Network Connection
*/
#include "e1000_api.h"
bool active);
/*
* e1000_init_phy_params_82571 - Init PHY func ptrs.
* @hw: pointer to the HW structure
*/
static s32
{
DEBUGFUNC("e1000_init_phy_params_82571");
goto out;
}
case e1000_82571:
case e1000_82572:
/* This uses above function pointers */
/* Verify PHY ID */
ret_val = -E1000_ERR_PHY;
goto out;
}
break;
case e1000_82573:
/* This uses above function pointers */
/* Verify PHY ID */
ret_val = -E1000_ERR_PHY;
goto out;
}
break;
case e1000_82574:
case e1000_82583:
/* This uses above function pointers */
/* Verify PHY ID */
ret_val = -E1000_ERR_PHY;
goto out;
}
break;
default:
ret_val = -E1000_ERR_PHY;
goto out;
}
out:
return (ret_val);
}
/*
* e1000_init_nvm_params_82571 - Init NVM func ptrs.
* @hw: pointer to the HW structure
*/
static s32
{
DEBUGFUNC("e1000_init_nvm_params_82571");
break;
break;
default:
break;
}
case e1000_82573:
case e1000_82574:
case e1000_82583:
/*
* Autonomous Flash update bit must be cleared due
* to Flash update issue.
*/
eecd &= ~E1000_EECD_AUPDEN;
break;
}
/* Fall Through */
default:
/*
* Added to a constant, "size" becomes the left-shift value
* for setting word_size.
*/
/* EEPROM access above 16k is unsupported */
if (size > 14)
size = 14;
break;
}
/* Function Pointers */
return (E1000_SUCCESS);
}
/*
* e1000_init_mac_params_82571 - Init MAC func ptrs.
* @hw: pointer to the HW structure
*/
static s32
{
bool force_clear_smbi = false;
DEBUGFUNC("e1000_init_mac_params_82571");
/* Set media type */
break;
break;
default:
break;
}
/* Set mta register count */
/* Set rar entry count */
/* Set if part includes ASF firmware */
mac->asf_firmware_present = true;
/* Set if manageability features are enabled. */
? true : false;
/* Function pointers */
/* function id */
case e1000_82573:
case e1000_82574:
case e1000_82583:
break;
default:
break;
}
/* reset */
/* hw initialization */
/* link setup */
/* physical interface link setup */
/* check for link */
case e1000_media_type_copper:
break;
case e1000_media_type_fiber:
break;
break;
default:
goto out;
}
/* check management mode */
case e1000_82574:
case e1000_82583:
break;
default:
break;
}
/* multicast address update */
/* writing VFTA */
/* clearing VFTA */
/* setting MTA */
/* read mac address */
/* ID LED init */
/* blink LED */
/* setup LED */
/* cleanup LED */
case e1000_82574:
case e1000_82583:
break;
default:
break;
}
/* clear hardware counters */
/* link info */
/*
* Ensure that the inter-port SWSM.SMBI lock bit is clear before
* first NVM or PHY acess. This should be done for single-port
* devices, and for one port only on dual-port devices so that
* for those devices we can still use the SMBI lock to synchronize
* inter-port accesses to the PHY & NVM.
*/
case e1000_82571:
case e1000_82572:
if (!(swsm2 & E1000_SWSM2_LOCK)) {
/* Only do this for the first interface on this card */
force_clear_smbi = true;
} else
force_clear_smbi = false;
break;
default:
force_clear_smbi = true;
break;
}
if (force_clear_smbi) {
/* Make sure SWSM.SMBI is clear */
if (swsm & E1000_SWSM_SMBI) {
/*
* This bit should not be set on a first interface, and
* indicates that the bootagent or EFI code has
* improperly left this bit enabled
*/
DEBUGOUT("Please update your 82571 Bootagent\n");
}
}
/*
* Initialze device specific counter of SMBI acquisition
* timeouts.
*/
out:
return (ret_val);
}
/*
* e1000_init_function_pointers_82571 - Init func ptrs.
* @hw: pointer to the HW structure
*
* Called to initialize all function pointers and parameters.
*/
void
{
DEBUGFUNC("e1000_init_function_pointers_82571");
}
/*
* e1000_get_phy_id_82571 - Retrieve the PHY ID and revision
* @hw: pointer to the HW structure
*
* Reads the PHY registers and stores the PHY ID and possibly the PHY
* revision in the hardware structure.
*/
static s32
{
DEBUGFUNC("e1000_get_phy_id_82571");
case e1000_82571:
case e1000_82572:
/*
* The 82571 firmware may still be configuring the PHY. In
* this case, we cannot access the PHY until the configuration
* is done. So we explicitly set the PHY ID.
*/
break;
case e1000_82573:
break;
case e1000_82574:
case e1000_82583:
if (ret_val)
goto out;
usec_delay(20);
if (ret_val)
goto out;
break;
default:
ret_val = -E1000_ERR_PHY;
break;
}
out:
return (ret_val);
}
/*
* e1000_get_hw_semaphore_82571 - Acquire hardware semaphore
* @hw: pointer to the HW structure
*
* Acquire the HW semaphore to access the PHY or NVM
*/
{
s32 i = 0;
DEBUGFUNC("e1000_get_hw_semaphore_82571");
/*
* If we have timedout 3 times on trying to acquire
* the inter-port SMBI semaphore, there is old code
* operating on the other port, and it is not
* releasing SMBI. Modify the number of times that
* we try for the semaphore to interwork with this
* older code.
*/
sw_timeout = 1;
/* Get the SW semaphore */
while (i < sw_timeout) {
if (!(swsm & E1000_SWSM_SMBI))
break;
usec_delay(50);
i++;
}
if (i == sw_timeout) {
DEBUGOUT("Driver can't access device - SMBI bit is set.\n");
}
/* Get the FW semaphore. */
for (i = 0; i < fw_timeout; i++) {
/* Semaphore acquired if bit latched */
break;
usec_delay(50);
}
if (i == fw_timeout) {
/* Release semaphores */
DEBUGOUT("Driver can't access the NVM\n");
ret_val = -E1000_ERR_NVM;
goto out;
}
out:
return (ret_val);
}
/*
* e1000_put_hw_semaphore_82571 - Release hardware semaphore
* @hw: pointer to the HW structure
*
* Release hardware semaphore used to access the PHY or NVM
*/
void
{
DEBUGFUNC("e1000_put_hw_semaphore_generic");
}
/*
* e1000_acquire_nvm_82571 - Request for access to the EEPROM
* @hw: pointer to the HW structure
*
* To gain access to the EEPROM, first we must obtain a hardware semaphore.
* Then for non-82573 hardware, set the EEPROM access request bit and wait
* for EEPROM access grant bit. If the access grant bit is not set, release
* hardware semaphore.
*/
static s32
{
DEBUGFUNC("e1000_acquire_nvm_82571");
if (ret_val)
goto out;
case e1000_82573:
case e1000_82574:
case e1000_82583:
break;
default:
break;
}
if (ret_val)
out:
return (ret_val);
}
/*
* e1000_release_nvm_82571 - Release exclusive access to EEPROM
* @hw: pointer to the HW structure
*
* Stop any current commands to the EEPROM and clear the EEPROM request bit.
*/
static void
{
DEBUGFUNC("e1000_release_nvm_82571");
}
/*
* e1000_write_nvm_82571 - Write to EEPROM using appropriate interface
* @hw: pointer to the HW structure
* @offset: offset within the EEPROM to be written to
* @words: number of words to write
* @data: 16 bit word(s) to be written to the EEPROM
*
* For non-82573 silicon, write data to EEPROM at offset using SPI interface.
*
* If e1000_update_nvm_checksum is not called after this function, the
* EEPROM will most likely contain an invalid checksum.
*/
static s32
{
DEBUGFUNC("e1000_write_nvm_82571");
case e1000_82573:
case e1000_82574:
case e1000_82583:
break;
case e1000_82571:
case e1000_82572:
break;
default:
ret_val = -E1000_ERR_NVM;
break;
}
return (ret_val);
}
/*
* e1000_update_nvm_checksum_82571 - Update EEPROM checksum
* @hw: pointer to the HW structure
*
* up to the checksum. Then calculates the EEPROM checksum and writes the
* value to the EEPROM.
*/
static s32
{
u16 i;
DEBUGFUNC("e1000_update_nvm_checksum_82571");
if (ret_val)
goto out;
/*
* If our nvm is an EEPROM, then we're done otherwise, commit the
* checksum to the flash NVM.
*/
goto out;
/* Check for pending operations. */
for (i = 0; i < E1000_FLASH_UPDATES; i++) {
msec_delay(1);
break;
}
if (i == E1000_FLASH_UPDATES) {
ret_val = -E1000_ERR_NVM;
goto out;
}
/* Reset the firmware if using STM opcode. */
/*
* The enabling of and the actual reset must be done in two
* write cycles.
*/
}
/* Commit the write to flash */
for (i = 0; i < E1000_FLASH_UPDATES; i++) {
msec_delay(1);
break;
}
if (i == E1000_FLASH_UPDATES) {
ret_val = -E1000_ERR_NVM;
goto out;
}
out:
return (ret_val);
}
/*
* e1000_validate_nvm_checksum_82571 - Validate EEPROM checksum
* @hw: pointer to the HW structure
*
* and then verifies that the sum of the EEPROM is equal to 0xBABA.
*/
static s32
{
DEBUGFUNC("e1000_validate_nvm_checksum_82571");
(void) e1000_fix_nvm_checksum_82571(hw);
return (e1000_validate_nvm_checksum_generic(hw));
}
/*
* e1000_write_nvm_eewr_82571 - Write to EEPROM for 82573 silicon
* @hw: pointer to the HW structure
* @offset: offset within the EEPROM to be written to
* @words: number of words to write
* @data: 16 bit word(s) to be written to the EEPROM
*
* After checking for invalid values, poll the EEPROM to ensure the previous
* command has completed before trying to write the next word. After write
* poll for completion.
*
* If e1000_update_nvm_checksum is not called after this function, the
* EEPROM will most likely contain an invalid checksum.
*/
static s32
{
DEBUGFUNC("e1000_write_nvm_eewr_82571");
/*
* A check for invalid values: offset too large, too many words, and
* not enough words.
*/
(words == 0)) {
DEBUGOUT("nvm parameter(s) out of bounds\n");
ret_val = -E1000_ERR_NVM;
goto out;
}
for (i = 0; i < words; i++) {
((offset + i) << E1000_NVM_RW_ADDR_SHIFT) |
if (ret_val)
break;
if (ret_val)
break;
}
out:
return (ret_val);
}
/*
* e1000_get_cfg_done_82571 - Poll for configuration done
* @hw: pointer to the HW structure
*
* Reads the management control register for the config done bit to be set.
*/
static s32
{
DEBUGFUNC("e1000_get_cfg_done_82571");
while (timeout) {
break;
msec_delay(1);
timeout--;
}
if (!timeout) {
DEBUGOUT("MNG configuration cycle has not completed.\n");
goto out;
}
out:
return (ret_val);
}
/*
* e1000_set_d0_lplu_state_82571 - Set Low Power Linkup D0 state
* @hw: pointer to the HW structure
* @active: true to enable LPLU, false to disable
*
* Sets the LPLU D0 state according to the active flag. When activating LPLU
* this function also disables smart speed and vice versa. LPLU will not be
* activated unless the device autonegotiation advertisement meets standards
* of either 10 or 10/100 or 10/100/1000 at all duplexes. This is a function
* pointer entry point only called by PHY setup routines.
*/
static s32
{
DEBUGFUNC("e1000_set_d0_lplu_state_82571");
goto out;
if (ret_val)
goto out;
if (active) {
data);
if (ret_val)
goto out;
/* When LPLU is enabled, we should disable SmartSpeed */
&data);
data);
if (ret_val)
goto out;
} else {
data);
/*
* LPLU and SmartSpeed are mutually exclusive. LPLU is used
* during Dx states where the power conservation is most
* important. During driver activity we should enable
* SmartSpeed, so performance is maintained.
*/
&data);
if (ret_val)
goto out;
data);
if (ret_val)
goto out;
&data);
if (ret_val)
goto out;
data);
if (ret_val)
goto out;
}
}
out:
return (ret_val);
}
/*
* e1000_reset_hw_82571 - Reset hardware
* @hw: pointer to the HW structure
*
* This resets the hardware into a known state.
*/
static s32
{
u16 i = 0;
DEBUGFUNC("e1000_reset_hw_82571");
/*
* Prevent the PCI-E bus from sticking if there is no TLP connection
*/
if (ret_val)
DEBUGOUT("PCI-E Master disable polling has failed.\n");
DEBUGOUT("Masking off all interrupts\n");
msec_delay(10);
/*
* Must acquire the MDIO ownership before MAC reset. Ownership
* defaults to firmware after a reset.
*/
case e1000_82573:
case e1000_82574:
case e1000_82583:
do {
break;
msec_delay(2);
i++;
} while (i < MDIO_OWNERSHIP_TIMEOUT);
break;
default:
break;
}
DEBUGOUT("Issuing a global reset to MAC\n");
usec_delay(10);
}
if (ret_val)
/* We don't want to continue accessing MAC registers. */
goto out;
/*
* Phy configuration from NVM just starts after EECD_AUTO_RD is set.
* Need to wait for Phy configuration completion before accessing
* NVM and Phy.
*/
case e1000_82573:
case e1000_82574:
case e1000_82583:
msec_delay(25);
break;
default:
break;
}
/* Clear any pending interrupt events. */
/* Install any alternate MAC address into RAR0 */
if (ret_val)
goto out;
e1000_set_laa_state_82571(hw, true);
/* Reinitialize the 82571 serdes link state machine */
out:
return (ret_val);
}
/*
* e1000_init_hw_82571 - Initialize hardware
* @hw: pointer to the HW structure
*
* This inits the hardware readying it for operation.
*/
static s32
{
DEBUGFUNC("e1000_init_hw_82571");
/* Initialize identification LED */
if (ret_val) {
DEBUGOUT("Error initializing identification LED\n");
/* This is not fatal and we should not stop init due to this */
}
/* Disabling VLAN filtering */
DEBUGOUT("Initializing the IEEE VLAN\n");
/* Setup the receive address. */
/*
* If, however, a locally administered address was assigned to the
* 82571, we must reserve a RAR for it to work around an issue where
* resetting one port will reload the MAC on the other port.
*/
if (e1000_get_laa_state_82571(hw))
rar_count--;
/* Zero out the Multicast HASH table */
DEBUGOUT("Zeroing the MTA\n");
for (i = 0; i < mac->mta_reg_count; i++)
/* Setup link and flow control */
/* Set the transmit descriptor write-back policy */
/* ...for both queues. */
case e1000_82573:
case e1000_82574:
case e1000_82583:
break;
default:
break;
}
/*
* Clear all of the statistics registers (clear on read). It is
* important that we do this after we have tried to establish link
* because the symbol error count will increment wildly if there
* is no link.
*/
return (ret_val);
}
/*
* e1000_initialize_hw_bits_82571 - Initialize hardware-dependent bits
* @hw: pointer to the HW structure
*
* Initializes required hardware-dependent bits needed for normal operation.
*/
static void
{
DEBUGFUNC("e1000_initialize_hw_bits_82571");
/* Transmit Descriptor Control 0 */
/* Transmit Descriptor Control 1 */
/* Transmit Arbitration Control 0 */
case e1000_82571:
case e1000_82572:
break;
default:
break;
}
/* Transmit Arbitration Control 1 */
case e1000_82571:
case e1000_82572:
else
break;
default:
break;
}
/* Device Control */
case e1000_82573:
case e1000_82574:
case e1000_82583:
break;
default:
break;
}
/* Extended Device Control */
case e1000_82573:
case e1000_82574:
case e1000_82583:
break;
default:
break;
}
}
/*
* Workaround for hardware errata.
* Ensure that DMA Dynamic Clock gating is disabled on 82571 and 82572
*/
}
/* PCI-Ex Control Registers */
case e1000_82574:
case e1000_82583:
/*
* Workaround for hardware errata.
* apply workaround for hardware errata documented in errata
* docs Fixes issue where some error prone or unreliable PCIe
* completions are occurring, particularly with ASPM enabled.
* Without fix, issue can cause tx timeouts.
*/
reg |= 1;
break;
default:
break;
}
}
/*
* e1000_clear_vfta_82571 - Clear VLAN filter table
* @hw: pointer to the HW structure
*
* Clears the register array which contains the VLAN filter table by
* setting all the values to 0.
*/
static void
{
u32 vfta_value = 0;
u32 vfta_offset = 0;
u32 vfta_bit_in_reg = 0;
DEBUGFUNC("e1000_clear_vfta_82571");
case e1000_82573:
case e1000_82574:
case e1000_82583:
/*
* The VFTA is a 4096b bit-field, each identifying
* a single VLAN ID. The following operations
* determine which 32b entry (i.e. offset) into the
* array we want to set the VLAN ID (i.e. bit) of
* the manageability unit.
*/
}
offset ++) {
/*
* If the offset we want to clear is the same offset of
* the manageability VLAN ID, then clear all bits except
* that of the manageability unit
*/
vfta_bit_in_reg : 0;
}
break;
default:
break;
}
}
/*
* e1000_check_mng_mode_82574 - Check manageability is enabled
* @hw: pointer to the HW structure
*
* Reads the NVM Initialization Control Word 2 and returns true
* (>0) if any manageability is enabled, else false (0).
*/
static bool
{
DEBUGFUNC("e1000_check_mng_mode_82574");
return ((data & E1000_NVM_INIT_CTRL2_MNGM) != 0);
}
/*
* e1000_led_on_82574 - Turn LED on
* @hw: pointer to the HW structure
*
* Turn LED on.
*/
static s32
{
u32 i;
DEBUGFUNC("e1000_led_on_82574");
/*
* If no link, then turn LED on by setting the invert bit
* for each LED that's "on" (0x0E) in ledctl_mode2.
*/
for (i = 0; i < 4; i++)
}
return (E1000_SUCCESS);
}
/*
* e1000_setup_link_82571 - Setup flow control and link settings
* @hw: pointer to the HW structure
*
* Determines which flow control settings to use, then configures flow
* control. Calls the appropriate media-specific link configuration
* function. Assuming the adapter has a valid link partner, a valid link
* should be established. Assumes the hardware has previously been reset
* and the transmitter and receiver are not enabled.
*/
static s32
{
DEBUGFUNC("e1000_setup_link_82571");
/*
* 82573 does not have a word in the NVM to determine the default flow
* control setting, so we explicitly set it to full.
*/
case e1000_82573:
case e1000_82574:
case e1000_82583:
break;
default:
break;
}
return (e1000_setup_link_generic(hw));
}
/*
* e1000_setup_copper_link_82571 - Configure copper link settings
* @hw: pointer to the HW structure
*
* Configures the link for auto-neg or forced speed and duplex. Then we check
* for link, once link is established calls to configure collision distance
* and flow control are called.
*/
static s32
{
DEBUGFUNC("e1000_setup_copper_link_82571");
ctrl |= E1000_CTRL_SLU;
case e1000_phy_m88:
case e1000_phy_bm:
break;
case e1000_phy_igp_2:
break;
default:
ret_val = -E1000_ERR_PHY;
break;
}
if (ret_val)
goto out;
out:
return (ret_val);
}
/*
* @hw: pointer to the HW structure
*
* Configures collision distance and flow control for fiber and serdes links.
* Upon successful setup, poll for link.
*/
static s32
{
DEBUGFUNC("e1000_setup_fiber_serdes_link_82571");
case e1000_82571:
case e1000_82572:
/*
* If SerDes loopback mode is entered, there is no form of
* reset to take the adapter out of that mode. So we have to
* explicitly take the adapter out of loopback mode. This
* prevents drivers from twiddling their thumbs if another
* tool failed to take it out of loopback mode.
*/
break;
default:
break;
}
return (e1000_setup_fiber_serdes_link_generic(hw));
}
/*
* e1000_check_for_serdes_link_82571 - Check for link (Serdes)
* @hw: pointer to the HW structure
*
* Reports the link state as up or down.
*
* If autonegotiation is supported by the link partner, the link state is
* determined by the result of autongotiation. This is the most likely case.
* If autonegotiation is not supported by the link partner, and the link
* has a valid signal, force the link up.
*
* The link state is represented internally here by 4 states:
*
* 1) down
* 2) autoneg_progress
* 3) autoneg_complete (the link sucessfully autonegotiated)
* 4) forced_up (the link has been forced up, it did not autonegotiate)
*/
{
DEBUGFUNC("e1000_check_for_serdes_link_82571");
/* Receiver is synchronized with no invalid bits. */
switch (mac->serdes_link_state) {
if (!(status & E1000_STATUS_LU)) {
/*
* We have lost link, retry autoneg before
* reporting link failure
*/
mac->serdes_has_link = false;
DEBUGOUT("AN_UP -> AN_PROG\n");
}
break;
/*
* If we are receiving /C/ ordered sets, re-enable
* auto-negotiation in the TXCW register and disable
* forced link in the Device Control register in an
* attempt to auto-negotiate with our link partner.
*/
if (rxcw & E1000_RXCW_C) {
/* Enable autoneg, and unforce link up */
(ctrl & ~E1000_CTRL_SLU));
mac->serdes_has_link = false;
DEBUGOUT("FORCED_UP -> AN_PROG\n");
}
break;
if (rxcw & E1000_RXCW_C) {
/*
* We received /C/ ordered sets, meaning the
* link partner has autonegotiated, and we can
* trust the Link Up (LU) status bit
*/
if (status & E1000_STATUS_LU) {
DEBUGOUT("AN_PROG -> AN_UP\n");
mac->serdes_has_link = true;
} else {
/* Autoneg completed, but failed */
DEBUGOUT("AN_PROG -> DOWN\n");
}
} else {
/*
* The link partner did not autoneg.
* Force link up and full duplex, and change
* state to forced.
*/
/* Configure Flow Control after link up. */
ret_val =
if (ret_val) {
DEBUGOUT("Error config flow control\n");
break;
}
mac->serdes_has_link = true;
DEBUGOUT("AN_PROG -> FORCED_UP\n");
}
break;
case e1000_serdes_link_down:
default:
/*
* The link was down but the receiver has now gained
* valid sync, so lets see if we can bring the link
* up.
*/
(ctrl & ~E1000_CTRL_SLU));
DEBUGOUT("DOWN -> AN_PROG\n");
break;
}
} else {
if (!(rxcw & E1000_RXCW_SYNCH)) {
mac->serdes_has_link = false;
DEBUGOUT("ANYSTATE -> DOWN\n");
} else {
/*
* We have sync, and can tolerate one
* invalid (IV) codeword before declaring
* link down, so reread to look again
*/
usec_delay(10);
if (rxcw & E1000_RXCW_IV) {
mac->serdes_has_link = false;
DEBUGOUT("ANYSTATE -> DOWN\n");
}
}
}
return (ret_val);
}
/*
* e1000_valid_led_default_82571 - Verify a valid default LED config
* @hw: pointer to the HW structure
* @data: pointer to the NVM (EEPROM)
*
* Read the EEPROM for the current default LED configuration. If the
* LED configuration is not valid, set to a valid LED configuration.
*/
static s32
{
DEBUGFUNC("e1000_valid_led_default_82571");
if (ret_val) {
DEBUGOUT("NVM Read Error\n");
goto out;
}
case e1000_82573:
case e1000_82574:
case e1000_82583:
if (*data == ID_LED_RESERVED_F746)
break;
default:
if (*data == ID_LED_RESERVED_0000 ||
*data == ID_LED_RESERVED_FFFF)
*data = ID_LED_DEFAULT;
break;
}
out:
return (ret_val);
}
/*
* e1000_get_laa_state_82571 - Get locally administered address state
* @hw: pointer to the HW structure
*
* Retrieve and return the current locally administered address state.
*/
bool
{
DEBUGFUNC("e1000_get_laa_state_82571");
return (false);
}
/*
* e1000_set_laa_state_82571 - Set locally administered address state
* @hw: pointer to the HW structure
*
*/
void
{
DEBUGFUNC("e1000_set_laa_state_82571");
return;
/* If workaround is activated... */
if (state) {
/*
* Hold a copy of the LAA in RAR[14] This is done so that
* between the time RAR[0] gets clobbered and the time it gets
* fixed, the actual LAA is in one of the RARs and no incoming
* packets directed to this port are dropped. Eventually the
* LAA will be in RAR[0] and RAR[14].
*/
}
}
/*
* e1000_fix_nvm_checksum_82571 - Fix EEPROM checksum
* @hw: pointer to the HW structure
*
* Verifies that the EEPROM has completed the update. After updating the
* EEPROM, we need to check bit 15 in work 0x23 for the checksum fix. If
* the checksum fix is not implemented, we need to set the bit and update
* the checksum. Otherwise, if bit 15 is set and the checksum is incorrect,
* we need to return bad checksum.
*/
static s32
{
DEBUGFUNC("e1000_fix_nvm_checksum_82571");
goto out;
/*
* Check bit 4 of word 10h. If it is 0, firmware is done updating
* 10h-12h. Checksum may need to be fixed.
*/
if (ret_val)
goto out;
if (!(data & 0x10)) {
/*
* Read 0x23 and check bit 15. This bit is a 1 when the
* checksum has already been fixed. If the checksum is still
* wrong and this bit is a 1, we need to return bad checksum.
* Otherwise, we need to set this bit to a 1 and update the
* checksum.
*/
if (ret_val)
goto out;
if (!(data & 0x8000)) {
data |= 0x8000;
if (ret_val)
goto out;
}
}
out:
return (ret_val);
}
/*
* e1000_read_mac_addr_82571 - Read device MAC address
* @hw: pointer to the HW structure
*/
static s32
{
DEBUGFUNC("e1000_read_mac_addr_82571");
/*
* If there's an alternate MAC address place it in RAR0
* so that it will override the Si installed default perm
* address.
*/
if (ret_val)
goto out;
out:
return (ret_val);
}
/*
* e1000_power_down_phy_copper_82571 - Remove link during PHY power down
* @hw: pointer to the HW structure
*
* In the case of a PHY power down to save power, or to turn off link during a
* driver unload, or wake on lan is not enabled, remove the link.
*/
static void
{
return;
/* If the management interface is not enabled, then power down */
}
/*
* e1000_clear_hw_cntrs_82571 - Clear device specific hardware counters
* @hw: pointer to the HW structure
*
* Clears the hardware counters by reading the counter registers.
*/
static void
{
DEBUGFUNC("e1000_clear_hw_cntrs_82571");
}