e1000_80003es2lan.c revision caf05df5c10c960028f122b1b02a3f7d8f892c31
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
699f790c49d03a9ef3c3234a72d272bb469203e8Evan Hunt * This file is provided under a CDDLv1 license. When using or
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * redistributing this file, you may do so under this license.
0c27b3fe77ac1d5094ba3521e8142d9e7973133fMark Andrews * In redistributing this file this license must be included
0c27b3fe77ac1d5094ba3521e8142d9e7973133fMark Andrews * and no other modification of this header file is permitted.
0c27b3fe77ac1d5094ba3521e8142d9e7973133fMark Andrews *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * CDDL LICENSE SUMMARY
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * The contents of this file are subject to the terms of Version
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * 1.0 of the Common Development and Distribution License (the "License").
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * You should have received a copy of the License with this software.
699f790c49d03a9ef3c3234a72d272bb469203e8Evan Hunt * You can obtain a copy of the License at
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * http://www.opensolaris.org/os/licensing.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * See the License for the specific language governing permissions
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * and limitations under the License.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Use is subject to license terms of the CDDLv1.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * IntelVersion: 1.86 v3-1-3_2009-8-20
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt/*
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt * 80003ES2LAN Gigabit Ethernet Controller (Copper)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * 80003ES2LAN Gigabit Ethernet Controller (Serdes)
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt#include "e1000_api.h"
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_init_phy_params_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_init_nvm_params_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic void e1000_release_phy_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_acquire_nvm_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic void e1000_release_nvm_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u32 offset, u16 *data);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u32 offset, u16 data);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u16 words, u16 *data);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_get_cfg_done_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_get_cable_length_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u16 *duplex);
e20788e1216ed720aefa84f3295f7899d9f28c22Mark Andrewsstatic s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u16 *data);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u16 data);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw);
80169c379dd4e0a6e164b7cac4bf5fa013c91138Mark Andrewsstatic void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_read_mac_addr_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic void e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * A table for the GG82563 cable length where the range is defined with a
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * lower bound at "index" and the upper bound at "index + 5".
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic const u16 e1000_gg82563_cable_length_table[] =
acbb301e648b82fcc38b876a44403cf0fe539cc9Evan Hunt {0, 60, 115, 150, 150, 60, 115, 150, 180, 180, 0xFF};
acbb301e648b82fcc38b876a44403cf0fe539cc9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt#define GG82563_CABLE_LENGTH_TABLE_SIZE \
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt (sizeof (e1000_gg82563_cable_length_table) / \
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt sizeof (e1000_gg82563_cable_length_table[0]))
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_init_phy_params_80003es2lan - Init ESB2 PHY func ptrs.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_init_phy_params_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt struct e1000_phy_info *phy = &hw->phy;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt s32 ret_val = E1000_SUCCESS;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_init_phy_params_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (hw->phy.media_type != e1000_media_type_copper) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->type = e1000_phy_none;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt } else {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.power_up = e1000_power_up_phy_copper;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.power_down = e1000_power_down_phy_copper_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->addr = 1;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->reset_delay_us = 100;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->type = e1000_phy_gg82563;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.acquire = e1000_acquire_phy_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.check_polarity = e1000_check_polarity_m88;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.check_reset_block = e1000_check_reset_block_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.commit = e1000_phy_sw_reset_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.get_cfg_done = e1000_get_cfg_done_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.get_info = e1000_get_phy_info_m88;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.release = e1000_release_phy_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.reset = e1000_phy_hw_reset_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.get_cable_length = e1000_get_cable_length_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.read_reg = e1000_read_phy_reg_gg82563_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.write_reg = e1000_write_phy_reg_gg82563_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.cfg_on_link_up = e1000_cfg_on_link_up_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* This can only be done after all function pointers are setup. */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_get_phy_id(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Verify phy id */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (phy->id != GG82563_E_PHY_ID) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = -E1000_ERR_PHY;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntout:
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (ret_val);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_init_nvm_params_80003es2lan - Init ESB2 NVM func ptrs.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_init_nvm_params_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt struct e1000_nvm_info *nvm = &hw->nvm;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u32 eecd = E1000_READ_REG(hw, E1000_EECD);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u16 size;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_init_nvm_params_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt nvm->opcode_bits = 8;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt nvm->delay_usec = 1;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt switch (nvm->override) {
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt case e1000_nvm_override_spi_large:
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt nvm->page_size = 32;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt nvm->address_bits = 16;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt break;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt case e1000_nvm_override_spi_small:
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt nvm->page_size = 8;
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt nvm->address_bits = 8;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt break;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt default:
acbb301e648b82fcc38b876a44403cf0fe539cc9Evan Hunt nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
acbb301e648b82fcc38b876a44403cf0fe539cc9Evan Hunt nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ? 16 : 8;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt break;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt nvm->type = e1000_nvm_eeprom_spi;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt E1000_EECD_SIZE_EX_SHIFT);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Added to a constant, "size" becomes the left-shift value
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * for setting word_size.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt size += NVM_WORD_SIZE_BASE_SHIFT;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* EEPROM access above 16k is unsupported */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (size > 14)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt size = 14;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt nvm->word_size = 1 << size;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Function Pointers */
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt nvm->ops.acquire = e1000_acquire_nvm_80003es2lan;
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt nvm->ops.read = e1000_read_nvm_eerd;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt nvm->ops.release = e1000_release_nvm_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt nvm->ops.update = e1000_update_nvm_checksum_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt nvm->ops.valid_led_default = e1000_valid_led_default_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt nvm->ops.validate = e1000_validate_nvm_checksum_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt nvm->ops.write = e1000_write_nvm_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (E1000_SUCCESS);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_init_mac_params_80003es2lan - Init ESB2 MAC func ptrs.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_init_mac_params_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt struct e1000_mac_info *mac = &hw->mac;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt s32 ret_val = E1000_SUCCESS;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_init_mac_params_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Set media type */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt switch (hw->device_id) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt case E1000_DEV_ID_80003ES2LAN_SERDES_DPT:
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt hw->phy.media_type = e1000_media_type_internal_serdes;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt break;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt default:
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt hw->phy.media_type = e1000_media_type_copper;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt break;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Set mta register count */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->mta_reg_count = 128;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Set rar entry count */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->rar_entry_count = E1000_RAR_ENTRIES;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Set if part includes ASF firmware */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->asf_firmware_present = true;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Set if manageability features are enabled. */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->arc_subsystem_valid =
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt (E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ? true : false;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Function pointers */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* bus type/speed/width */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.get_bus_info = e1000_get_bus_info_pcie_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* reset */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.reset_hw = e1000_reset_hw_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* hw initialization */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.init_hw = e1000_init_hw_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* link setup */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.setup_link = e1000_setup_link_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* physical interface link setup */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.setup_physical_interface =
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt (hw->phy.media_type == e1000_media_type_copper)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ? e1000_setup_copper_link_80003es2lan
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt : e1000_setup_fiber_serdes_link_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* check for link */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt switch (hw->phy.media_type) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt case e1000_media_type_copper:
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.check_for_link = e1000_check_for_copper_link_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt break;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt case e1000_media_type_fiber:
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.check_for_link = e1000_check_for_fiber_link_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt break;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt case e1000_media_type_internal_serdes:
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.check_for_link = e1000_check_for_serdes_link_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt break;
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt default:
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt ret_val = -E1000_ERR_CONFIG;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* check management mode */
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt mac->ops.check_mng_mode = e1000_check_mng_mode_generic;
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt /* multicast address update */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* writing VFTA */
acbb301e648b82fcc38b876a44403cf0fe539cc9Evan Hunt mac->ops.write_vfta = e1000_write_vfta_generic;
acbb301e648b82fcc38b876a44403cf0fe539cc9Evan Hunt /* clearing VFTA */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.clear_vfta = e1000_clear_vfta_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* setting MTA */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.mta_set = e1000_mta_set_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* read mac address */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.read_mac_addr = e1000_read_mac_addr_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* ID LED init */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.id_led_init = e1000_id_led_init_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* blink LED */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.blink_led = e1000_blink_led_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* setup LED */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.setup_led = e1000_setup_led_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* cleanup LED */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.cleanup_led = e1000_cleanup_led_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* turn on/off LED */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.led_on = e1000_led_on_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.led_off = e1000_led_off_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* clear hardware counters */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* link info */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.get_link_up_info = e1000_get_link_up_info_80003es2lan;
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt /* set lan id for port to determine which phy lock to use */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt hw->mac.ops.set_lan_id(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntout:
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (ret_val);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_init_function_pointers_80003es2lan - Init ESB2 func ptrs.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Called to initialize all function pointers and parameters.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntvoid
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_init_function_pointers_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_init_function_pointers_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt hw->mac.ops.init_params = e1000_init_mac_params_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt hw->nvm.ops.init_params = e1000_init_nvm_params_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt hw->phy.ops.init_params = e1000_init_phy_params_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_acquire_phy_80003es2lan - Acquire rights to access PHY
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * A wrapper to acquire access rights to the correct PHY.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_acquire_phy_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u16 mask;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_acquire_phy_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (e1000_acquire_swfw_sync_80003es2lan(hw, mask));
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_release_phy_80003es2lan - Release rights to access PHY
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * A wrapper to release access rights to the correct PHY.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic void
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_release_phy_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u16 mask;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_release_phy_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_release_swfw_sync_80003es2lan(hw, mask);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_acquire_mac_csr_80003es2lan - Acquire rights to access Kumeran register
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Acquire the semaphore to access the Kumeran interface.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_acquire_mac_csr_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u16 mask;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_acquire_mac_csr_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mask = E1000_SWFW_CSR_SM;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (e1000_acquire_swfw_sync_80003es2lan(hw, mask));
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_release_mac_csr_80003es2lan - Release rights to access Kumeran Register
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Release the semaphore used to access the Kumeran interface
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic void
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_release_mac_csr_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u16 mask;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_release_mac_csr_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mask = E1000_SWFW_CSR_SM;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_release_swfw_sync_80003es2lan(hw, mask);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_acquire_nvm_80003es2lan - Acquire rights to access NVM
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Acquire the semaphore to access the EEPROM.
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_acquire_nvm_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt s32 ret_val;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_acquire_nvm_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_acquire_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (ret_val)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_acquire_nvm_generic(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (ret_val)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_release_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntout:
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (ret_val);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt * e1000_release_nvm_80003es2lan - Relinquish rights to access NVM
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Release the semaphore used to access the EEPROM.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic void
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_release_nvm_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_release_nvm_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_release_nvm_generic(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_release_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_acquire_swfw_sync_80003es2lan - Acquire SW/FW semaphore
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @mask: specifies which semaphore to acquire
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Acquire the SW/FW semaphore to access the PHY or NVM. The mask
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * will also specify which port we're acquiring the lock for.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u32 swfw_sync;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u32 swmask = mask;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u32 fwmask = mask << 16;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt s32 ret_val = E1000_SUCCESS;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt s32 i = 0, timeout = 50;
420a43c8d8028992a4e9c170022f97bfac689025Evan Hunt
420a43c8d8028992a4e9c170022f97bfac689025Evan Hunt DEBUGFUNC("e1000_acquire_swfw_sync_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt while (i < timeout) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (e1000_get_hw_semaphore_generic(hw)) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = -E1000_ERR_SWFW_SYNC;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
420a43c8d8028992a4e9c170022f97bfac689025Evan Hunt swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
420a43c8d8028992a4e9c170022f97bfac689025Evan Hunt if (!(swfw_sync & (fwmask | swmask)))
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt break;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Firmware currently using resource (fwmask)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * or other software thread using resource (swmask)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_put_hw_semaphore_generic(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt msec_delay_irq(5);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt i++;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (i == timeout) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGOUT("Driver can't access resource, SW_FW_SYNC timeout.\n");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = -E1000_ERR_SWFW_SYNC;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt swfw_sync |= swmask;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_put_hw_semaphore_generic(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntout:
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (ret_val);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_release_swfw_sync_80003es2lan - Release SW/FW semaphore
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @mask: specifies which semaphore to acquire
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Release the SW/FW semaphore used to access the PHY or NVM. The mask
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * will also specify which port we're releasing the lock for.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic void
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u32 swfw_sync;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_release_swfw_sync_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt while (e1000_get_hw_semaphore_generic(hw) != E1000_SUCCESS) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Empty */
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt }
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt swfw_sync &= ~mask;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_put_hw_semaphore_generic(hw);
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt}
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_read_phy_reg_gg82563_80003es2lan - Read GG82563 PHY register
acbb301e648b82fcc38b876a44403cf0fe539cc9Evan Hunt * @hw: pointer to the HW structure
acbb301e648b82fcc38b876a44403cf0fe539cc9Evan Hunt * @offset: offset of the register to read
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @data: pointer to the data returned from the operation
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Read the GG82563 PHY register.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u32 offset, u16 *data)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt s32 ret_val;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u32 page_select;
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt u16 temp;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_read_phy_reg_gg82563_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_acquire_phy_80003es2lan(hw);
80169c379dd4e0a6e164b7cac4bf5fa013c91138Mark Andrews if (ret_val)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Select Configuration Page */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt page_select = GG82563_PHY_PAGE_SELECT;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt } else {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Use Alternative Page Select register to access
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * registers 30 and 31
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt page_select = GG82563_PHY_PAGE_SELECT_ALT;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt temp = (u16)((u16)offset >> GG82563_PAGE_SHIFT);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_write_phy_reg_mdic(hw, page_select, temp);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (ret_val) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_release_phy_80003es2lan(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (hw->dev_spec._80003es2lan.mdic_wa_enable == true) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * The "ready" bit in the MDIC register may be incorrectly set
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * before the device has completed the "Page Select" MDI
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * transaction. So we wait 200us after each MDI command...
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt usec_delay(200);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* ...and verify the command was successful. */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_read_phy_reg_mdic(hw, page_select, &temp);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = -E1000_ERR_PHY;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_release_phy_80003es2lan(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt usec_delay(200);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_read_phy_reg_mdic(hw,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt MAX_PHY_REG_ADDRESS & offset,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt data);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt usec_delay(200);
e20788e1216ed720aefa84f3295f7899d9f28c22Mark Andrews } else
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_read_phy_reg_mdic(hw,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt MAX_PHY_REG_ADDRESS & offset,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt data);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_release_phy_80003es2lan(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntout:
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (ret_val);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_write_phy_reg_gg82563_80003es2lan - Write GG82563 PHY register
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @offset: offset of the register to read
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @data: value to write to the register
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Write to the GG82563 PHY register.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u32 offset, u16 data)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt s32 ret_val;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u32 page_select;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u16 temp;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt DEBUGFUNC("e1000_write_phy_reg_gg82563_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_acquire_phy_80003es2lan(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (ret_val)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Select Configuration Page */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt page_select = GG82563_PHY_PAGE_SELECT;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt } else {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Use Alternative Page Select register to access
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * registers 30 and 31
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt page_select = GG82563_PHY_PAGE_SELECT_ALT;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt temp = (u16)((u16)offset >> GG82563_PAGE_SHIFT);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_write_phy_reg_mdic(hw, page_select, temp);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (ret_val) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_release_phy_80003es2lan(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (hw->dev_spec._80003es2lan.mdic_wa_enable == true) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * The "ready" bit in the MDIC register may be incorrectly set
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * before the device has completed the "Page Select" MDI
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * transaction. So we wait 200us after each MDI command...
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt usec_delay(200);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* ...and verify the command was successful. */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_read_phy_reg_mdic(hw, page_select, &temp);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = -E1000_ERR_PHY;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_release_phy_80003es2lan(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt usec_delay(200);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_write_phy_reg_mdic(hw,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt MAX_PHY_REG_ADDRESS & offset,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt data);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt usec_delay(200);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt } else
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt ret_val = e1000_write_phy_reg_mdic(hw,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt MAX_PHY_REG_ADDRESS & offset,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt data);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_release_phy_80003es2lan(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntout:
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (ret_val);
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_write_nvm_80003es2lan - Write to ESB2 NVM
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @offset: offset of the register to read
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @words: number of words to write
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @data: buffer of data to write to the NVM
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Write "words" of data to the ESB2 NVM.
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u16 words, u16 *data)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_write_nvm_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (e1000_write_nvm_spi(hw, offset, words, data));
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_get_cfg_done_80003es2lan - Wait for configuration to complete
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt * Wait a specific amount of time for manageability processes to complete.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * This is a function pointer entry point called by the phy module.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_get_cfg_done_80003es2lan(struct e1000_hw *hw)
80169c379dd4e0a6e164b7cac4bf5fa013c91138Mark Andrews{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt s32 timeout = PHY_CFG_TIMEOUT;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt s32 ret_val = E1000_SUCCESS;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u32 mask = E1000_NVM_CFG_DONE_PORT_0;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_get_cfg_done_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (hw->bus.func == 1)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mask = E1000_NVM_CFG_DONE_PORT_1;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt while (timeout) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (E1000_READ_REG(hw, E1000_EEMNGCTL) & mask)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt break;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt msec_delay(1);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt timeout--;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (!timeout) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGOUT("MNG configuration cycle has not completed.\n");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = -E1000_ERR_RESET;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntout:
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (ret_val);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_phy_force_speed_duplex_80003es2lan - Force PHY speed and duplex
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * @hw: pointer to the HW structure
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt *
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * Force the speed and duplex settings onto the PHY. This is a
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * function pointer entry point called by the phy module.
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt */
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Huntstatic s32
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunte1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw)
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt{
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt s32 ret_val = E1000_SUCCESS;
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt u16 phy_data;
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt bool link;
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt DEBUGFUNC("e1000_phy_force_speed_duplex_80003es2lan");
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt if (!(hw->phy.ops.read_reg))
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt goto out;
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt /*
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * Clear Auto-Crossover to force MDI manually. M88E1000 requires MDI
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * forced whenever speed and duplex are forced.
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt */
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt if (ret_val)
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt goto out;
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt phy_data &= ~GG82563_PSCR_CROSSOVER_MODE_AUTO;
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, phy_data);
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt if (ret_val)
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt goto out;
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt DEBUGOUT1("GG82563 PSCR: %X\n", phy_data);
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_data);
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt if (ret_val)
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt goto out;
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt e1000_phy_force_speed_duplex_setup(hw, &phy_data);
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt /* Reset the phy to commit changes. */
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt phy_data |= MII_CR_RESET;
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_data);
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt if (ret_val)
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt goto out;
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt usec_delay(1);
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt if (hw->phy.autoneg_wait_to_complete) {
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt DEBUGOUT("Waiting for forced speed/duplex link "
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt "on GG82563 phy.\n");
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt 100000, &link);
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt if (ret_val)
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt goto out;
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt if (!link) {
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt /*
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * We didn't get link.
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * Reset the DSP and cross our fingers.
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt */
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt ret_val = e1000_phy_reset_dsp_generic(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (ret_val)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Try once more */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt 100000, &link);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (ret_val)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val =
6972eaffdbb7bb83c1b8565adfc6778430f80c8cFrancis Dupont hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, &phy_data);
6972eaffdbb7bb83c1b8565adfc6778430f80c8cFrancis Dupont if (ret_val)
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt goto out;
6972eaffdbb7bb83c1b8565adfc6778430f80c8cFrancis Dupont
6972eaffdbb7bb83c1b8565adfc6778430f80c8cFrancis Dupont /*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Resetting the phy means we need to verify the TX_CLK corresponds
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * to the link speed. 10Mbps -> 2.5MHz, else 25MHz.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy_data &= ~GG82563_MSCR_TX_CLK_MASK;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (hw->mac.forced_speed_duplex & E1000_ALL_10_SPEED)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy_data |= GG82563_MSCR_TX_CLK_10MBPS_2_5;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt else
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy_data |= GG82563_MSCR_TX_CLK_100MBPS_25;
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * In addition, we must re-enable CRS on Tx for both half and full
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * duplex.
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy_data |= GG82563_MSCR_ASSERT_CRS_ON_TX;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val =
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt hw->phy.ops.write_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, phy_data);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntout:
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (ret_val);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_get_cable_length_80003es2lan - Set approximate cable length
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Find the approximate cable length as measured by the GG82563 PHY.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * This is a function pointer entry point called by the phy module.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunte1000_get_cable_length_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt struct e1000_phy_info *phy = &hw->phy;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt s32 ret_val = E1000_SUCCESS;
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt u16 phy_data, index;
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_get_cable_length_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (!(hw->phy.ops.read_reg))
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_DSP_DISTANCE, &phy_data);
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt if (ret_val)
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt goto out;
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt index = phy_data & GG82563_DSPD_CABLE_LENGTH;
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt if (index >= GG82563_CABLE_LENGTH_TABLE_SIZE - 5) {
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt ret_val = E1000_ERR_PHY;
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt goto out;
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt }
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt phy->min_cable_length = e1000_gg82563_cable_length_table[index];
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt phy->max_cable_length = e1000_gg82563_cable_length_table[index + 5];
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt
6972eaffdbb7bb83c1b8565adfc6778430f80c8cFrancis Dupont phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Huntout:
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt return (ret_val);
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt}
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt/*
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt * e1000_get_link_up_info_80003es2lan - Report speed and duplex
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * @hw: pointer to the HW structure
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * @speed: pointer to speed buffer
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * @duplex: pointer to duplex buffer
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt *
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * Retrieve the current speed and duplex configuration.
420a43c8d8028992a4e9c170022f97bfac689025Evan Hunt */
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Huntstatic s32
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunte1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed, u16 *duplex)
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt{
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt s32 ret_val;
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt DEBUGFUNC("e1000_get_link_up_info_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (hw->phy.media_type == e1000_media_type_copper) {
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt ret_val = e1000_get_speed_and_duplex_copper_generic(hw,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt speed,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt duplex);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt hw->phy.ops.cfg_on_link_up(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt } else {
80169c379dd4e0a6e164b7cac4bf5fa013c91138Mark Andrews ret_val = e1000_get_speed_and_duplex_fiber_serdes_generic(hw,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt speed,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt duplex);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt }
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (ret_val);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_reset_hw_80003es2lan - Reset the ESB2 controller
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Perform a global reset to the ESB2 controller.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_reset_hw_80003es2lan(struct e1000_hw *hw)
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u32 ctrl;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt s32 ret_val;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_reset_hw_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Prevent the PCI-E bus from sticking if there is no TLP connection
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt * on the last TLP read/write transaction when MAC is reset.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_disable_pcie_master_generic(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (ret_val)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGOUT("PCI-E Master disable polling has failed.\n");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGOUT("Masking off all interrupts\n");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt E1000_WRITE_REG(hw, E1000_RCTL, 0);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt E1000_WRITE_FLUSH(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt msec_delay(10);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ctrl = E1000_READ_REG(hw, E1000_CTRL);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_acquire_phy_80003es2lan(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGOUT("Issuing a global reset to MAC\n");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_release_phy_80003es2lan(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_get_auto_rd_done_generic(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (ret_val)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* We don't want to continue accessing MAC registers. */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt goto out;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Clear any pending interrupt events. */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt (void) E1000_READ_REG(hw, E1000_ICR);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_check_alt_mac_addr_generic(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntout:
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (ret_val);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt}
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt/*
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_init_hw_80003es2lan - Initialize the ESB2 controller
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt *
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Initialize the hw bits, LED, VFTA, MTA, link and hw counters.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_init_hw_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt{
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt struct e1000_mac_info *mac = &hw->mac;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u32 reg_data;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt s32 ret_val;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt u16 i;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_init_hw_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_initialize_hw_bits_80003es2lan(hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt
/* Initialize identification LED */
ret_val = mac->ops.id_led_init(hw);
if (ret_val) {
DEBUGOUT("Error initializing identification LED\n");
/* This is not fatal and we should not stop init due to this */
}
/* Disabling VLAN filtering */
DEBUGOUT("Initializing the IEEE VLAN\n");
mac->ops.clear_vfta(hw);
/* Setup the receive address. */
e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
/* Zero out the Multicast HASH table */
DEBUGOUT("Zeroing the MTA\n");
for (i = 0; i < mac->mta_reg_count; i++)
E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
/* Setup link and flow control */
ret_val = mac->ops.setup_link(hw);
/* Set the transmit descriptor write-back policy */
reg_data = E1000_READ_REG(hw, E1000_TXDCTL(0));
reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC;
E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg_data);
/* ...for both queues. */
reg_data = E1000_READ_REG(hw, E1000_TXDCTL(1));
reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC;
E1000_WRITE_REG(hw, E1000_TXDCTL(1), reg_data);
/* Enable retransmit on late collisions */
reg_data = E1000_READ_REG(hw, E1000_TCTL);
reg_data |= E1000_TCTL_RTLC;
E1000_WRITE_REG(hw, E1000_TCTL, reg_data);
/* Configure Gigabit Carry Extend Padding */
reg_data = E1000_READ_REG(hw, E1000_TCTL_EXT);
reg_data &= ~E1000_TCTL_EXT_GCEX_MASK;
reg_data |= DEFAULT_TCTL_EXT_GCEX_80003ES2LAN;
E1000_WRITE_REG(hw, E1000_TCTL_EXT, reg_data);
/* Configure Transmit Inter-Packet Gap */
reg_data = E1000_READ_REG(hw, E1000_TIPG);
reg_data &= ~E1000_TIPG_IPGT_MASK;
reg_data |= DEFAULT_TIPG_IPGT_1000_80003ES2LAN;
E1000_WRITE_REG(hw, E1000_TIPG, reg_data);
reg_data = E1000_READ_REG_ARRAY(hw, E1000_FFLT, 0x0001);
reg_data &= ~0x00100000;
E1000_WRITE_REG_ARRAY(hw, E1000_FFLT, 0x0001, reg_data);
/* default to true to enable the MDIC W/A */
hw->dev_spec._80003es2lan.mdic_wa_enable = true;
ret_val = e1000_read_kmrn_reg_80003es2lan(hw,
E1000_KMRNCTRLSTA_OFFSET >>
E1000_KMRNCTRLSTA_OFFSET_SHIFT,
&i);
if (!ret_val) {
if ((i & E1000_KMRNCTRLSTA_OPMODE_MASK) ==
E1000_KMRNCTRLSTA_OPMODE_INBAND_MDIO)
hw->dev_spec._80003es2lan.mdic_wa_enable = false;
}
/*
* Clear all of the statistics registers (clear on read). It is
* important that we do this after we have tried to establish link
* because the symbol error count will increment wildly if there
* is no link.
*/
e1000_clear_hw_cntrs_80003es2lan(hw);
return (ret_val);
}
/*
* e1000_initialize_hw_bits_80003es2lan - Init hw bits of ESB2
* @hw: pointer to the HW structure
*
* Initializes required hardware-dependent bits needed for normal operation.
*/
static void
e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw)
{
u32 reg;
DEBUGFUNC("e1000_initialize_hw_bits_80003es2lan");
/* Transmit Descriptor Control 0 */
reg = E1000_READ_REG(hw, E1000_TXDCTL(0));
reg |= (1 << 22);
E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg);
/* Transmit Descriptor Control 1 */
reg = E1000_READ_REG(hw, E1000_TXDCTL(1));
reg |= (1 << 22);
E1000_WRITE_REG(hw, E1000_TXDCTL(1), reg);
/* Transmit Arbitration Control 0 */
reg = E1000_READ_REG(hw, E1000_TARC(0));
reg &= ~(0xF << 27); /* 30:27 */
if (hw->phy.media_type != e1000_media_type_copper)
reg &= ~(1 << 20);
E1000_WRITE_REG(hw, E1000_TARC(0), reg);
/* Transmit Arbitration Control 1 */
reg = E1000_READ_REG(hw, E1000_TARC(1));
if (E1000_READ_REG(hw, E1000_TCTL) & E1000_TCTL_MULR)
reg &= ~(1 << 28);
else
reg |= (1 << 28);
E1000_WRITE_REG(hw, E1000_TARC(1), reg);
}
/*
* e1000_copper_link_setup_gg82563_80003es2lan - Configure GG82563 Link
* @hw: pointer to the HW structure
*
* Setup some GG82563 PHY registers for obtaining link
*/
static s32
e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)
{
struct e1000_phy_info *phy = &hw->phy;
s32 ret_val;
u32 ctrl_ext;
u16 data;
DEBUGFUNC("e1000_copper_link_setup_gg82563_80003es2lan");
if (!phy->reset_disable) {
ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
&data);
if (ret_val)
goto out;
data |= GG82563_MSCR_ASSERT_CRS_ON_TX;
/* Use 25MHz for both link down and 1000Base-T for Tx clock. */
data |= GG82563_MSCR_TX_CLK_1000MBPS_25;
ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
data);
if (ret_val)
goto out;
/*
* Options:
* MDI/MDI-X = 0 (default)
* 0 - Auto for all speeds
* 1 - MDI mode
* 2 - MDI-X mode
* 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes)
*/
ret_val =
hw->phy.ops.read_reg(hw, GG82563_PHY_SPEC_CTRL, &data);
if (ret_val)
goto out;
data &= ~GG82563_PSCR_CROSSOVER_MODE_MASK;
switch (phy->mdix) {
case 1:
data |= GG82563_PSCR_CROSSOVER_MODE_MDI;
break;
case 2:
data |= GG82563_PSCR_CROSSOVER_MODE_MDIX;
break;
case 0:
default:
data |= GG82563_PSCR_CROSSOVER_MODE_AUTO;
break;
}
/*
* Options:
* disable_polarity_correction = 0 (default)
* Automatic Correction for Reversed Cable Polarity
* 0 - Disabled
* 1 - Enabled
*/
data &= ~GG82563_PSCR_POLARITY_REVERSAL_DISABLE;
if (phy->disable_polarity_correction)
data |= GG82563_PSCR_POLARITY_REVERSAL_DISABLE;
ret_val =
hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, data);
if (ret_val)
goto out;
/* SW Reset the PHY so all changes take effect */
ret_val = hw->phy.ops.commit(hw);
if (ret_val) {
DEBUGOUT("Error Resetting the PHY\n");
goto out;
}
}
/* Bypass Rx and Tx FIFO's */
ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
E1000_KMRNCTRLSTA_OFFSET_FIFO_CTRL,
E1000_KMRNCTRLSTA_FIFO_CTRL_RX_BYPASS |
E1000_KMRNCTRLSTA_FIFO_CTRL_TX_BYPASS);
if (ret_val)
goto out;
ret_val = e1000_read_kmrn_reg_80003es2lan(hw,
E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE,
&data);
if (ret_val)
goto out;
data |= E1000_KMRNCTRLSTA_OPMODE_E_IDLE;
ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE,
data);
if (ret_val)
goto out;
ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_SPEC_CTRL_2, &data);
if (ret_val)
goto out;
data &= ~GG82563_PSCR2_REVERSE_AUTO_NEG;
ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL_2, data);
if (ret_val)
goto out;
ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
ctrl_ext &= ~(E1000_CTRL_EXT_LINK_MODE_MASK);
E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_PWR_MGMT_CTRL, &data);
if (ret_val)
goto out;
/*
* Do not init these registers when the HW is in IAMT mode, since the
* firmware will have already initialized them. We only initialize
* them if the HW is not in IAMT mode.
*/
if (!(hw->mac.ops.check_mng_mode(hw))) {
/* Enable Electrical Idle on the PHY */
data |= GG82563_PMCR_ENABLE_ELECTRICAL_IDLE;
ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_PWR_MGMT_CTRL,
data);
if (ret_val)
goto out;
ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
&data);
if (ret_val)
goto out;
data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
data);
if (ret_val)
goto out;
}
/*
* Workaround: Disable padding in Kumeran interface in the MAC
* and in the PHY to avoid CRC errors.
*/
ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_INBAND_CTRL, &data);
if (ret_val)
goto out;
data |= GG82563_ICR_DIS_PADDING;
ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_INBAND_CTRL, data);
if (ret_val)
goto out;
out:
return (ret_val);
}
/*
* e1000_setup_copper_link_80003es2lan - Setup Copper Link for ESB2
* @hw: pointer to the HW structure
*
* Essentially a wrapper for setting up all things "copper" related.
* This is a function pointer entry point called by the mac module.
*/
static s32
e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw)
{
u32 ctrl;
s32 ret_val;
u16 reg_data;
DEBUGFUNC("e1000_setup_copper_link_80003es2lan");
ctrl = E1000_READ_REG(hw, E1000_CTRL);
ctrl |= E1000_CTRL_SLU;
ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
/*
* Set the mac to wait the maximum time between each
* iteration and increase the max iterations when
* polling the phy; this fixes erroneous timeouts at 10Mbps.
*/
ret_val = e1000_write_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 4),
0xFFFF);
if (ret_val)
goto out;
ret_val = e1000_read_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 9),
&reg_data);
if (ret_val)
goto out;
reg_data |= 0x3F;
ret_val = e1000_write_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 9),
reg_data);
if (ret_val)
goto out;
ret_val = e1000_read_kmrn_reg_80003es2lan(hw,
E1000_KMRNCTRLSTA_OFFSET_INB_CTRL,
&reg_data);
if (ret_val)
goto out;
reg_data |= E1000_KMRNCTRLSTA_INB_CTRL_DIS_PADDING;
ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
E1000_KMRNCTRLSTA_OFFSET_INB_CTRL,
reg_data);
if (ret_val)
goto out;
ret_val = e1000_copper_link_setup_gg82563_80003es2lan(hw);
if (ret_val)
goto out;
ret_val = e1000_setup_copper_link_generic(hw);
out:
return (ret_val);
}
/*
* e1000_cfg_on_link_up_80003es2lan - es2 link configuration after link-up
* @hw: pointer to the HW structure
* @duplex: current duplex setting
*
* Configure the KMRN interface by applying last minute quirks for
* 10/100 operation.
*/
static s32
e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw)
{
s32 ret_val = E1000_SUCCESS;
u16 speed;
u16 duplex;
DEBUGFUNC("e1000_configure_on_link_up");
if (hw->phy.media_type == e1000_media_type_copper) {
ret_val = e1000_get_speed_and_duplex_copper_generic(hw,
&speed,
&duplex);
if (ret_val)
goto out;
if (speed == SPEED_1000)
ret_val = e1000_cfg_kmrn_1000_80003es2lan(hw);
else
ret_val = e1000_cfg_kmrn_10_100_80003es2lan(hw, duplex);
}
out:
return (ret_val);
}
/*
* e1000_cfg_kmrn_10_100_80003es2lan - Apply "quirks" for 10/100 operation
* @hw: pointer to the HW structure
* @duplex: current duplex setting
*
* Configure the KMRN interface by applying last minute quirks for
* 10/100 operation.
*/
static s32
e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex)
{
s32 ret_val = E1000_SUCCESS;
u32 tipg;
u32 i = 0;
u16 reg_data, reg_data2;
DEBUGFUNC("e1000_configure_kmrn_for_10_100");
reg_data = E1000_KMRNCTRLSTA_HD_CTRL_10_100_DEFAULT;
ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
E1000_KMRNCTRLSTA_OFFSET_HD_CTRL,
reg_data);
if (ret_val)
goto out;
/* Configure Transmit Inter-Packet Gap */
tipg = E1000_READ_REG(hw, E1000_TIPG);
tipg &= ~E1000_TIPG_IPGT_MASK;
tipg |= DEFAULT_TIPG_IPGT_10_100_80003ES2LAN;
E1000_WRITE_REG(hw, E1000_TIPG, tipg);
do {
ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
&reg_data);
if (ret_val)
goto out;
ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
&reg_data2);
if (ret_val)
goto out;
i++;
} while ((reg_data != reg_data2) && (i < GG82563_MAX_KMRN_RETRY));
if (duplex == HALF_DUPLEX)
reg_data |= GG82563_KMCR_PASS_FALSE_CARRIER;
else
reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
ret_val =
hw->phy.ops.write_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
out:
return (ret_val);
}
/*
* e1000_cfg_kmrn_1000_80003es2lan - Apply "quirks" for gigabit operation
* @hw: pointer to the HW structure
*
* Configure the KMRN interface by applying last minute quirks for
* gigabit operation.
*/
static s32
e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw)
{
s32 ret_val = E1000_SUCCESS;
u16 reg_data, reg_data2;
u32 tipg;
u32 i = 0;
DEBUGFUNC("e1000_configure_kmrn_for_1000");
reg_data = E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT;
ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
E1000_KMRNCTRLSTA_OFFSET_HD_CTRL,
reg_data);
if (ret_val)
goto out;
/* Configure Transmit Inter-Packet Gap */
tipg = E1000_READ_REG(hw, E1000_TIPG);
tipg &= ~E1000_TIPG_IPGT_MASK;
tipg |= DEFAULT_TIPG_IPGT_1000_80003ES2LAN;
E1000_WRITE_REG(hw, E1000_TIPG, tipg);
do {
ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
&reg_data);
if (ret_val)
goto out;
ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
&reg_data2);
if (ret_val)
goto out;
i++;
} while ((reg_data != reg_data2) && (i < GG82563_MAX_KMRN_RETRY));
reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
ret_val =
hw->phy.ops.write_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
out:
return (ret_val);
}
/*
* e1000_read_kmrn_reg_80003es2lan - Read kumeran register
* @hw: pointer to the HW structure
* @offset: register offset to be read
* @data: pointer to the read data
*
* Acquire semaphore, then read the PHY register at offset
* using the kumeran interface. The information retrieved is stored in data.
* Release the semaphore before exiting.
*/
static s32
e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, u16 *data)
{
u32 kmrnctrlsta;
s32 ret_val = E1000_SUCCESS;
DEBUGFUNC("e1000_read_kmrn_reg_80003es2lan");
ret_val = e1000_acquire_mac_csr_80003es2lan(hw);
if (ret_val)
goto out;
kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;
E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);
usec_delay(2);
kmrnctrlsta = E1000_READ_REG(hw, E1000_KMRNCTRLSTA);
*data = (u16)kmrnctrlsta;
e1000_release_mac_csr_80003es2lan(hw);
out:
return (ret_val);
}
/*
* e1000_write_kmrn_reg_80003es2lan - Write kumeran register
* @hw: pointer to the HW structure
* @offset: register offset to write to
* @data: data to write at register offset
*
* Acquire semaphore, then write the data to PHY register
* at the offset using the kumeran interface. Release semaphore
* before exiting.
*/
static s32
e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, u16 data)
{
u32 kmrnctrlsta;
s32 ret_val = E1000_SUCCESS;
DEBUGFUNC("e1000_write_kmrn_reg_80003es2lan");
ret_val = e1000_acquire_mac_csr_80003es2lan(hw);
if (ret_val)
goto out;
kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
E1000_KMRNCTRLSTA_OFFSET) | data;
E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);
usec_delay(2);
e1000_release_mac_csr_80003es2lan(hw);
out:
return (ret_val);
}
/*
* e1000_read_mac_addr_80003es2lan - Read device MAC address
* @hw: pointer to the HW structure
*/
static s32
e1000_read_mac_addr_80003es2lan(struct e1000_hw *hw)
{
s32 ret_val = E1000_SUCCESS;
DEBUGFUNC("e1000_read_mac_addr_80003es2lan");
/*
* If there's an alternate MAC address place it in RAR0
* so that it will override the Si installed default perm
* address.
*/
ret_val = e1000_check_alt_mac_addr_generic(hw);
if (ret_val)
goto out;
ret_val = e1000_read_mac_addr_generic(hw);
out:
return (ret_val);
}
/*
* e1000_power_down_phy_copper_80003es2lan - Remove link during PHY power down
* @hw: pointer to the HW structure
*
* In the case of a PHY power down to save power, or to turn off link during a
* driver unload, or wake on lan is not enabled, remove the link.
*/
static void
e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw)
{
/* If the management interface is not enabled, then power down */
if (!(hw->mac.ops.check_mng_mode(hw) ||
hw->phy.ops.check_reset_block(hw)))
e1000_power_down_phy_copper(hw);
}
/*
* e1000_clear_hw_cntrs_80003es2lan - Clear device specific hardware counters
* @hw: pointer to the HW structure
*
* Clears the hardware counters by reading the counter registers.
*/
static void
e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw)
{
DEBUGFUNC("e1000_clear_hw_cntrs_80003es2lan");
e1000_clear_hw_cntrs_base_generic(hw);
(void) E1000_READ_REG(hw, E1000_PRC64);
(void) E1000_READ_REG(hw, E1000_PRC127);
(void) E1000_READ_REG(hw, E1000_PRC255);
(void) E1000_READ_REG(hw, E1000_PRC511);
(void) E1000_READ_REG(hw, E1000_PRC1023);
(void) E1000_READ_REG(hw, E1000_PRC1522);
(void) E1000_READ_REG(hw, E1000_PTC64);
(void) E1000_READ_REG(hw, E1000_PTC127);
(void) E1000_READ_REG(hw, E1000_PTC255);
(void) E1000_READ_REG(hw, E1000_PTC511);
(void) E1000_READ_REG(hw, E1000_PTC1023);
(void) E1000_READ_REG(hw, E1000_PTC1522);
(void) E1000_READ_REG(hw, E1000_ALGNERRC);
(void) E1000_READ_REG(hw, E1000_RXERRC);
(void) E1000_READ_REG(hw, E1000_TNCRS);
(void) E1000_READ_REG(hw, E1000_CEXTERR);
(void) E1000_READ_REG(hw, E1000_TSCTC);
(void) E1000_READ_REG(hw, E1000_TSCTFC);
(void) E1000_READ_REG(hw, E1000_MGTPRC);
(void) E1000_READ_REG(hw, E1000_MGTPDC);
(void) E1000_READ_REG(hw, E1000_MGTPTC);
(void) E1000_READ_REG(hw, E1000_IAC);
(void) E1000_READ_REG(hw, E1000_ICRXOC);
(void) E1000_READ_REG(hw, E1000_ICRXPTC);
(void) E1000_READ_REG(hw, E1000_ICRXATC);
(void) E1000_READ_REG(hw, E1000_ICTXPTC);
(void) E1000_READ_REG(hw, E1000_ICTXATC);
(void) E1000_READ_REG(hw, E1000_ICTXQEC);
(void) E1000_READ_REG(hw, E1000_ICTXQMTC);
(void) E1000_READ_REG(hw, E1000_ICRXDMTC);
}