e1000_80003es2lan.c revision caf05df5c10c960028f122b1b02a3f7d8f892c31
699f790c49d03a9ef3c3234a72d272bb469203e8Evan Hunt * This file is provided under a CDDLv1 license. When using or
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * redistributing this file, you may do so under this license.
0c27b3fe77ac1d5094ba3521e8142d9e7973133fMark Andrews * In redistributing this file this license must be included
0c27b3fe77ac1d5094ba3521e8142d9e7973133fMark Andrews * and no other modification of this header file is permitted.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * CDDL LICENSE SUMMARY
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * The contents of this file are subject to the terms of Version
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * 1.0 of the Common Development and Distribution License (the "License").
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * You should have received a copy of the License with this software.
699f790c49d03a9ef3c3234a72d272bb469203e8Evan Hunt * You can obtain a copy of the License at
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * See the License for the specific language governing permissions
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * and limitations under the License.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Use is subject to license terms of the CDDLv1.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * IntelVersion: 1.86 v3-1-3_2009-8-20
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt * 80003ES2LAN Gigabit Ethernet Controller (Copper)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * 80003ES2LAN Gigabit Ethernet Controller (Serdes)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_init_phy_params_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_init_nvm_params_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic void e1000_release_phy_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_acquire_nvm_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic void e1000_release_nvm_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_get_cfg_done_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_get_cable_length_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
e20788e1216ed720aefa84f3295f7899d9f28c22Mark Andrewsstatic s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw);
80169c379dd4e0a6e164b7cac4bf5fa013c91138Mark Andrewsstatic void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic s32 e1000_read_mac_addr_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic void e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * A table for the GG82563 cable length where the range is defined with a
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * lower bound at "index" and the upper bound at "index + 5".
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Huntstatic const u16 e1000_gg82563_cable_length_table[] =
acbb301e648b82fcc38b876a44403cf0fe539cc9Evan Hunt {0, 60, 115, 150, 150, 60, 115, 150, 180, 180, 0xFF};
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_init_phy_params_80003es2lan - Init ESB2 PHY func ptrs.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_init_phy_params_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (hw->phy.media_type != e1000_media_type_copper) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.power_down = e1000_power_down_phy_copper_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.check_polarity = e1000_check_polarity_m88;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.check_reset_block = e1000_check_reset_block_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.get_cfg_done = e1000_get_cfg_done_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.get_cable_length = e1000_get_cable_length_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.read_reg = e1000_read_phy_reg_gg82563_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.write_reg = e1000_write_phy_reg_gg82563_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt phy->ops.cfg_on_link_up = e1000_cfg_on_link_up_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* This can only be done after all function pointers are setup. */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Verify phy id */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_init_nvm_params_80003es2lan - Init ESB2 NVM func ptrs.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_init_nvm_params_80003es2lan(struct e1000_hw *hw)
acbb301e648b82fcc38b876a44403cf0fe539cc9Evan Hunt nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
acbb301e648b82fcc38b876a44403cf0fe539cc9Evan Hunt nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ? 16 : 8;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Added to a constant, "size" becomes the left-shift value
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * for setting word_size.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* EEPROM access above 16k is unsupported */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Function Pointers */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt nvm->ops.update = e1000_update_nvm_checksum_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt nvm->ops.valid_led_default = e1000_valid_led_default_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt nvm->ops.validate = e1000_validate_nvm_checksum_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_init_mac_params_80003es2lan - Init ESB2 MAC func ptrs.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_init_mac_params_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Set media type */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt hw->phy.media_type = e1000_media_type_internal_serdes;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Set mta register count */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Set rar entry count */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Set if part includes ASF firmware */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Set if manageability features are enabled. */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt (E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ? true : false;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Function pointers */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.get_bus_info = e1000_get_bus_info_pcie_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* hw initialization */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* link setup */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* physical interface link setup */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* check for link */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.check_for_link = e1000_check_for_copper_link_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.check_for_link = e1000_check_for_fiber_link_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.check_for_link = e1000_check_for_serdes_link_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* check management mode */
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt mac->ops.check_mng_mode = e1000_check_mng_mode_generic;
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt /* multicast address update */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* writing VFTA */
acbb301e648b82fcc38b876a44403cf0fe539cc9Evan Hunt /* clearing VFTA */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* setting MTA */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* read mac address */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.read_mac_addr = e1000_read_mac_addr_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* ID LED init */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* blink LED */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* setup LED */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* cleanup LED */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* turn on/off LED */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* clear hardware counters */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* link info */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mac->ops.get_link_up_info = e1000_get_link_up_info_80003es2lan;
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt /* set lan id for port to determine which phy lock to use */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_init_function_pointers_80003es2lan - Init ESB2 func ptrs.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Called to initialize all function pointers and parameters.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_init_function_pointers_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_init_function_pointers_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt hw->mac.ops.init_params = e1000_init_mac_params_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt hw->nvm.ops.init_params = e1000_init_nvm_params_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt hw->phy.ops.init_params = e1000_init_phy_params_80003es2lan;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_acquire_phy_80003es2lan - Acquire rights to access PHY
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * A wrapper to acquire access rights to the correct PHY.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (e1000_acquire_swfw_sync_80003es2lan(hw, mask));
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_release_phy_80003es2lan - Release rights to access PHY
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * A wrapper to release access rights to the correct PHY.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_acquire_mac_csr_80003es2lan - Acquire rights to access Kumeran register
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Acquire the semaphore to access the Kumeran interface.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_acquire_mac_csr_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (e1000_acquire_swfw_sync_80003es2lan(hw, mask));
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_release_mac_csr_80003es2lan - Release rights to access Kumeran Register
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Release the semaphore used to access the Kumeran interface
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_release_mac_csr_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_acquire_nvm_80003es2lan - Acquire rights to access NVM
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Acquire the semaphore to access the EEPROM.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_acquire_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_release_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt * e1000_release_nvm_80003es2lan - Relinquish rights to access NVM
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Release the semaphore used to access the EEPROM.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt e1000_release_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_acquire_swfw_sync_80003es2lan - Acquire SW/FW semaphore
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @mask: specifies which semaphore to acquire
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Acquire the SW/FW semaphore to access the PHY or NVM. The mask
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * will also specify which port we're acquiring the lock for.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt while (i < timeout) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Firmware currently using resource (fwmask)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * or other software thread using resource (swmask)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGOUT("Driver can't access resource, SW_FW_SYNC timeout.\n");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_release_swfw_sync_80003es2lan - Release SW/FW semaphore
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @mask: specifies which semaphore to acquire
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Release the SW/FW semaphore used to access the PHY or NVM. The mask
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * will also specify which port we're releasing the lock for.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt while (e1000_get_hw_semaphore_generic(hw) != E1000_SUCCESS) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_read_phy_reg_gg82563_80003es2lan - Read GG82563 PHY register
acbb301e648b82fcc38b876a44403cf0fe539cc9Evan Hunt * @hw: pointer to the HW structure
acbb301e648b82fcc38b876a44403cf0fe539cc9Evan Hunt * @offset: offset of the register to read
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @data: pointer to the data returned from the operation
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Read the GG82563 PHY register.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGFUNC("e1000_read_phy_reg_gg82563_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Select Configuration Page */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Use Alternative Page Select register to access
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * registers 30 and 31
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_write_phy_reg_mdic(hw, page_select, temp);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (hw->dev_spec._80003es2lan.mdic_wa_enable == true) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * The "ready" bit in the MDIC register may be incorrectly set
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * before the device has completed the "Page Select" MDI
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * transaction. So we wait 200us after each MDI command...
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* ...and verify the command was successful. */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_read_phy_reg_mdic(hw, page_select, &temp);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_write_phy_reg_gg82563_80003es2lan - Write GG82563 PHY register
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @offset: offset of the register to read
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @data: value to write to the register
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Write to the GG82563 PHY register.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt DEBUGFUNC("e1000_write_phy_reg_gg82563_80003es2lan");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Select Configuration Page */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Use Alternative Page Select register to access
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * registers 30 and 31
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_write_phy_reg_mdic(hw, page_select, temp);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (hw->dev_spec._80003es2lan.mdic_wa_enable == true) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * The "ready" bit in the MDIC register may be incorrectly set
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * before the device has completed the "Page Select" MDI
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * transaction. So we wait 200us after each MDI command...
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* ...and verify the command was successful. */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_read_phy_reg_mdic(hw, page_select, &temp);
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) {
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_write_nvm_80003es2lan - Write to ESB2 NVM
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @offset: offset of the register to read
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @words: number of words to write
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @data: buffer of data to write to the NVM
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Write "words" of data to the ESB2 NVM.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt return (e1000_write_nvm_spi(hw, offset, words, data));
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_get_cfg_done_80003es2lan - Wait for configuration to complete
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt * Wait a specific amount of time for manageability processes to complete.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * This is a function pointer entry point called by the phy module.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunte1000_get_cfg_done_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGOUT("MNG configuration cycle has not completed.\n");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_phy_force_speed_duplex_80003es2lan - Force PHY speed and duplex
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * @hw: pointer to the HW structure
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * Force the speed and duplex settings onto the PHY. This is a
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * function pointer entry point called by the phy module.
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunte1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw)
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt DEBUGFUNC("e1000_phy_force_speed_duplex_80003es2lan");
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * Clear Auto-Crossover to force MDI manually. M88E1000 requires MDI
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * forced whenever speed and duplex are forced.
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, phy_data);
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_data);
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt e1000_phy_force_speed_duplex_setup(hw, &phy_data);
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt /* Reset the phy to commit changes. */
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_data);
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt "on GG82563 phy.\n");
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * We didn't get link.
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * Reset the DSP and cross our fingers.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Try once more */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
6972eaffdbb7bb83c1b8565adfc6778430f80c8cFrancis Dupont hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, &phy_data);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Resetting the phy means we need to verify the TX_CLK corresponds
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * to the link speed. 10Mbps -> 2.5MHz, else 25MHz.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (hw->mac.forced_speed_duplex & E1000_ALL_10_SPEED)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * In addition, we must re-enable CRS on Tx for both half and full
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt hw->phy.ops.write_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, phy_data);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_get_cable_length_80003es2lan - Set approximate cable length
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Find the approximate cable length as measured by the GG82563 PHY.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * This is a function pointer entry point called by the phy module.
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunte1000_get_cable_length_80003es2lan(struct e1000_hw *hw)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_DSP_DISTANCE, &phy_data);
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt if (index >= GG82563_CABLE_LENGTH_TABLE_SIZE - 5) {
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt phy->min_cable_length = e1000_gg82563_cable_length_table[index];
3249da26fc28297265d444a1f3647f1e6700a2a0Evan Hunt phy->max_cable_length = e1000_gg82563_cable_length_table[index + 5];
6972eaffdbb7bb83c1b8565adfc6778430f80c8cFrancis Dupont phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt * e1000_get_link_up_info_80003es2lan - Report speed and duplex
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * @hw: pointer to the HW structure
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * @speed: pointer to speed buffer
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * @duplex: pointer to duplex buffer
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunt * Retrieve the current speed and duplex configuration.
12bf5d4796505b4c20680531da96a31e6c2c1144Evan Hunte1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed, u16 *duplex)
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt if (hw->phy.media_type == e1000_media_type_copper) {
dbb012765c735ee0d82dedb116cdc7cf18957814Evan Hunt ret_val = e1000_get_speed_and_duplex_copper_generic(hw,
80169c379dd4e0a6e164b7cac4bf5fa013c91138Mark Andrews ret_val = e1000_get_speed_and_duplex_fiber_serdes_generic(hw,
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_reset_hw_80003es2lan - Reset the ESB2 controller
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Perform a global reset to the ESB2 controller.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Prevent the PCI-E bus from sticking if there is no TLP connection
1b255a0c4eaccf0feff70328a8c108a22abfbf3cEvan Hunt * on the last TLP read/write transaction when MAC is reset.
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt DEBUGOUT("PCI-E Master disable polling has failed.\n");
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* We don't want to continue accessing MAC registers. */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt /* Clear any pending interrupt events. */
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * e1000_init_hw_80003es2lan - Initialize the ESB2 controller
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * @hw: pointer to the HW structure
ba751492fcc4f161a18b983d4f018a1a52938cb9Evan Hunt * Initialize the hw bits, LED, VFTA, MTA, link and hw counters.
if (ret_val) {
if (!ret_val) {
if ((i & E1000_KMRNCTRLSTA_OPMODE_MASK) ==
return (ret_val);
static s32
&data);
if (ret_val)
goto out;
data);
if (ret_val)
goto out;
ret_val =
if (ret_val)
goto out;
ret_val =
if (ret_val)
goto out;
if (ret_val) {
goto out;
if (ret_val)
goto out;
&data);
if (ret_val)
goto out;
data);
if (ret_val)
goto out;
if (ret_val)
goto out;
if (ret_val)
goto out;
if (ret_val)
goto out;
data);
if (ret_val)
goto out;
&data);
if (ret_val)
goto out;
data);
if (ret_val)
goto out;
if (ret_val)
goto out;
if (ret_val)
goto out;
out:
return (ret_val);
static s32
if (ret_val)
goto out;
®_data);
if (ret_val)
goto out;
reg_data);
if (ret_val)
goto out;
®_data);
if (ret_val)
goto out;
reg_data);
if (ret_val)
goto out;
if (ret_val)
goto out;
out:
return (ret_val);
static s32
&speed,
&duplex);
if (ret_val)
goto out;
out:
return (ret_val);
static s32
u32 i = 0;
reg_data);
if (ret_val)
goto out;
®_data);
if (ret_val)
goto out;
®_data2);
if (ret_val)
goto out;
ret_val =
out:
return (ret_val);
static s32
u32 i = 0;
reg_data);
if (ret_val)
goto out;
®_data);
if (ret_val)
goto out;
®_data2);
if (ret_val)
goto out;
ret_val =
out:
return (ret_val);
static s32
if (ret_val)
goto out;
out:
return (ret_val);
static s32
if (ret_val)
goto out;
out:
return (ret_val);
static s32
if (ret_val)
goto out;
out:
return (ret_val);