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/*$FreeBSD$*/
#ifndef _E1000_82575_H_
#define _E1000_82575_H_
(ID_LED_DEF1_DEF2 << 8) | \
(ID_LED_DEF1_DEF2 << 4) | \
/*
* Receive Address Register Count
* Registers) holds the directed and multicast addresses that we monitor.
* These entries are also used for MAC-based filtering.
*/
/*
* For 82576, there are an additional set of RARs that begin at an offset
* separate from the first set of RARs.
*/
#ifdef E1000_BIT_FIELDS
struct e1000_adv_data_desc {
union {
struct {
} config;
} lower;
union {
struct {
} options;
} upper;
};
/* Extended Device Control */
struct e1000_adv_context_desc {
union {
struct {
} fields;
} ip_setup;
union {
struct {
} fields;
} l4_setup;
};
#endif
/* SRRCTL bit definitions */
#define E1000_EICR_TX_QUEUE ( \
#define E1000_EICR_RX_QUEUE ( \
#define EIMS_ENABLE_MASK ( \
/* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */
/* Receive Descriptor - Advanced */
union e1000_adv_rx_desc {
struct {
} read;
struct {
struct {
union {
struct {
/* Split Header, header buffer len */
} hs_rss;
} lo_dword;
union {
struct {
} csum_ip;
} hi_dword;
} lower;
struct {
} upper;
};
/* RSS Hash results */
/* RSS Packet Types as indicated in the receive descriptor */
/* LinkSec results */
/* Security Processing bit Indication */
/* Transmit Descriptor - Advanced */
union e1000_adv_tx_desc {
struct {
} read;
struct {
} wb;
};
/* Adv Transmit Descriptor Config Masks */
/* 1st & Last TSO-full iSCSI PDU*/
/* Context descriptors */
struct e1000_adv_tx_context_desc {
};
/* IPSec Encrypt Enable for ESP */
/* Req requires Markers and CRC */
/* Adv ctxt IPSec SA IDX mask */
/* Adv ctxt IPSec ESP len mask */
/* Additional Transmit Descriptor Control definitions */
/* Tx Queue Arbitration Priority 0=low, 1=high */
/* Additional Receive Descriptor Control definitions */
/* Direct Cache Access (DCA) definitions */
/* Additional interrupt register bit definitions */
/* ETQF register bit definitions */
/*
* ETQF filter list: one static filter per filter consumer. This is
* to avoid filter collisions later. Add new filters
* here!!
*
* Current filters:
* EAPOL 802.1x (0x888e): Filter 0
*/
#define E1000_ETQF_FILTER_EAPOL 0
/* Easy defines for setting default pool, would normally be left a zero */
/* Other useful VMD_CTL register defines */
/* Per VM Offload register setup */
/* Rx packet buffer size defines */
enum e1000_promisc_type {
};
/* I2C SDA and SCL timing parameters for standard mode */
#endif /* _E1000_82575_H_ */