d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * CDDL HEADER START
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * The contents of this file are subject to the terms of the
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * Common Development and Distribution License (the "License").
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * You may not use this file except in compliance with the License.
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * See the License for the specific language governing permissions
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * and limitations under the License.
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * When distributing Covered Code, include this CDDL HEADER in each
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * If applicable, add the following below this CDDL HEADER, with the
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * fields enclosed by brackets "[]" replaced with your own identifying
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * information: Portions Copyright [yyyy] [name of copyright owner]
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * CDDL HEADER END
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * Copyright (C) 2003-2005 Chelsio Communications. All rights reserved.
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* Revisions of T1 chip */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* Default MC5 region sizes */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw unsigned short requested_speed; /* speed user has requested */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw unsigned char requested_duplex; /* duplex user has requested */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw unsigned char requested_fc; /* flow control user has requested */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic inline int adapter_matches_type(const adapter_t *adapter,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define t1_is_T1B(adap) adapter_matches_type(adap, CHBT_TERM_T1, TERM_T1B)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define is_T2(adap) adapter_matches_type(adap, CHBT_TERM_T2, TERM_T2)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* Returns true if an adapter supports VLAN acceleration and TSO */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic inline int vlan_tso_capable(const adapter_t *adapter)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define is_10G(adapter) (board_info(adapter)->caps & SUPPORTED_10000baseT_Full)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic inline unsigned int core_ticks_per_usec(const adapter_t *adap)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwint __t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwint __t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwint t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwint t1_tpi_read(adapter_t *adapter, u32 addr, u32 *value);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwint t1_wait_op_done(adapter_t *adapter, int reg, u32 mask, int polarity,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwint t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwconst struct board_info *t1_get_board_info(unsigned int board_id);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwconst struct board_info *t1_get_board_info_from_ids(unsigned int devid,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw unsigned short ssid);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwint t1_seeprom_read(adapter_t *adapter, u32 addr, u32 *data);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwint t1_get_board_rev(adapter_t *adapter, const struct board_info *bi,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwint t1_init_sw_modules(adapter_t *adapter, const struct board_info *bi);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#endif /* CHELSIO_COMMON_H */