/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*
* Copyright 2014 QLogic Corporation
* The contents of this file are subject to the terms of the
* QLogic End User License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the License at
* See the License for the specific language governing permissions
* and limitations under the License.
*
* Generated On Date: 07/24/2009 20:59
*
*/
#ifndef EMAC_REG_H
#define EMAC_REG_H
/*
* emac_reg definition
* offset: 0x1400
*/
#define EMAC_MODE_RESET_BITSHIFT 0
#define EMAC_LED_OVERRIDE_BITSHIFT 0
#define EMAC_LED2_PHY_10MB_SOFT_BITSHIFT 0
#define EMAC_LED3_PHY_ACT_MSK_BITSHIFT 0
#define EMAC_RX_MTU_SIZE_MTU_SIZE_BITSHIFT 0
#define EMAC_MDIO_AUTO_POLL_DATA_MASK_BITSHIFT 0
#define EMAC_MDIO_COMM_DATA_BITSHIFT 0
#define EMAC_MDIO_STATUS_LINK_BITSHIFT 0
#define EMAC_MDIO_AUTO_STATUS_AUTO_ERR_BITSHIFT 0
#define EMAC_TX_MODE_RESET_BITSHIFT 0
#define EMAC_TX_STATUS_XOFFED_BITSHIFT 0
#define EMAC_TX_LENGTHS_SLOT_BITSHIFT 0
#define EMAC_RX_MODE_RESET_BITSHIFT 0
#define EMAC_RX_STATUS_FFED_BITSHIFT 0
#define EMAC_EEE_MODE_RX_LPI_ENA_BITSHIFT 0
#define EMAC_EEE_TIMER_EXIT_TIME_BITSHIFT 0
#define EMAC_RXMAC_DEBUG2_SM_STATE_BITSHIFT 0
#define EMAC_RXMAC_DEBUG2_SM_STATE_IDLE (0L<<0)
#define EMAC_RXMAC_DEBUG2_SM_STATE_IDLE_BITSHIFT 0
#define EMAC_RXMAC_DEBUG2_SM_STATE_SFD_BITSHIFT 0
#define EMAC_RXMAC_DEBUG2_SM_STATE_DATA_BITSHIFT 0
#define EMAC_RXMAC_DEBUG2_SM_STATE_EXT_BITSHIFT 0
#define EMAC_RXMAC_DEBUG2_SM_STATE_DROP_BITSHIFT 0
#define EMAC_RXMAC_DEBUG2_SM_STATE_FC_BITSHIFT 0
#define EMAC_RXMAC_DEBUG3_PAUSE_CTR_BITSHIFT 0
#define EMAC_RXMAC_DEBUG4_TYPE_FIELD_BITSHIFT 0
#define EMAC_RXMAC_DEBUG5_PS_IDISM_BITSHIFT 0
#define EMAC_RXMAC_DEBUG5_PS_IDISM_IDLE (0L<<0)
#define EMAC_RXMAC_DEBUG5_PS_IDISM_IDLE_BITSHIFT 0
#define EMAC_TXMAC_DEBUG1_ODI_STATE_BITSHIFT 0
#define EMAC_TXMAC_DEBUG1_ODI_STATE_IDLE (0L<<0)
#define EMAC_TXMAC_DEBUG2_BACK_OFF_BITSHIFT 0
#define EMAC_TXMAC_DEBUG3_SM_STATE_BITSHIFT 0
#define EMAC_TXMAC_DEBUG3_SM_STATE_IDLE (0L<<0)
#define EMAC_TXMAC_DEBUG3_SM_STATE_IDLE_BITSHIFT 0
#define EMAC_TXMAC_DEBUG3_SM_STATE_PRE1_BITSHIFT 0
#define EMAC_TXMAC_DEBUG3_SM_STATE_PRE2_BITSHIFT 0
#define EMAC_TXMAC_DEBUG3_SM_STATE_SFD_BITSHIFT 0
#define EMAC_TXMAC_DEBUG3_SM_STATE_DATA_BITSHIFT 0
#define EMAC_TXMAC_DEBUG3_SM_STATE_CRC1_BITSHIFT 0
#define EMAC_TXMAC_DEBUG3_SM_STATE_CRC2_BITSHIFT 0
#define EMAC_TXMAC_DEBUG3_SM_STATE_EXT_BITSHIFT 0
#define EMAC_TXMAC_DEBUG3_SM_STATE_JAM_BITSHIFT 0
#define EMAC_TXMAC_DEBUG3_SM_STATE_EJAM_BITSHIFT 0
#define EMAC_TXMAC_DEBUG3_SM_STATE_BJAM_BITSHIFT 0
#define EMAC_TXMAC_DEBUG4_PAUSE_COUNTER_BITSHIFT 0
#define EMAC_REG_RX_PFC_MODE_TX_EN_BITSHIFT 0
#define EMAC_REG_RX_PFC_PARAM_OPCODE_BITSHIFT 0
#endif /* EMAC_REG_H */