/*******************************************************************************
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
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* CDDL HEADER END
*
* Copyright 2014 QLogic Corporation
* The contents of this file are subject to the terms of the
* QLogic End User License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the License at
* See the License for the specific language governing permissions
* and limitations under the License.
*
*
* Module Description:
* This file defines the IDLE_CHK macros
*
* History:
* 11/02/08 Miri Shitrit Inception.
******************************************************************************/
#ifndef _LM_DEBUG_H
#define _LM_DEBUG_H
// bits must be corralted to the values in idle_chk.csv
// Added for E3
enum {
#if _MSC_VER
#if defined(_VBD_)
#include <ntddk.h>
#include <ntstrsafe.h>
#else
#include "vc_os_emul.h"
#endif // !NTDDI_VERSION
#else // !_MSC_VER
#endif // _MSC_VER
total++; \
var_severity = severity; \
if (condition) { \
switch (var_severity) { \
case IDLE_CHK_ERROR: \
errors++; \
break; \
case IDLE_CHK_ERROR_NO_TRAFFIC: \
errors++; \
break; \
case IDLE_CHK_WARNING: \
warnings++; \
break; \
}\
}
b_test_chip=0; \
var_chip_mask = 0; \
if (val == 5710) { \
} else if (((chip_rev == 0xC) || (chip_rev == 0xD) || (chip_rev == 1)) && ((val == 5773) || (val == 5774) || (val == 5770))) { \
} \
if (var_chip_mask & chip_mask) { \
b_test_chip = 1;\
}
/* read one reg and check the condition */
if (b_test_chip) { \
val1 = 0; \
val2 = 0; \
}
/* loop to read one reg and check the condition */
if (b_test_chip) { \
for (i = 0; i < (loop); i++) { \
val1 = 0; \
val2 = 0; \
} \
}
/* read two regs and check the condition */
if (b_test_chip) { \
val = 0; \
}
/* read one reg and check according to CID_CAM */
if (b_test_chip) { \
for (i = 0; i < (loop); i++) { \
snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "%s LCID %d CID_CAM 0x%x. Value is 0x%x\n", fail_msg, i, val2, val1);\
val = 0; \
} \
}
/* read one reg and check according to another reg */
if (b_test_chip) { \
if (!val) \
}
/* read wide-bus reg and check sub-fields */
{ \
if (b_test_chip) { \
for (i = 0; i < (loop); i++) { \
snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "QM: PTRTBL entry %d- rd_ptr is not equal to wr_ptr. Values are 0x%x 0x%x\n", i, rd_ptr, wr_ptr);\
val = 0; \
snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "QM: PTRTBL entry %d- rd_bank is not equal to wr_bank. Values are 0x%x 0x%x\n", i, rd_bank, wr_bank); \
val = 0; \
} \
} \
}
/* loop to read wide-bus reg and check according to another reg */
{ \
if (b_test_chip) { \
for (i = 0; i < (loop); i++) { \
if ((chip_num == 0x1662) || (chip_num == 0x1663) || (chip_num == 0x1651) || (chip_num == 0x1652)) { \
} else { \
} \
snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "%s - LCID %d CID_CAM 0x%x. Value is 0x%x\n", fail_msg, i, val2, val1); \
} \
} \
} \
}
/* check PXP VQ occupancy according to condition */
if (b_test_chip) { \
if (condition) { \
snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "%s. Value is 0x%x\n%s\n", fail_msg, val,_vq_hoq(pdev,#offset)); \
val = 0; \
val1 = 0; \
val2 = 0; \
} \
}
#endif// _LM_DEBUG_H