/*
* <Insert copyright here : it must be BSD-like so everyone can use it>
*
* Author: Erich Boleyn <erich@uruk.org> http://www.uruk.org/~erich/
*
* Header file implementing Intel MultiProcessor Specification (MPS)
* version 1.1 and 1.4 SMP hardware control for Intel Architecture CPUs,
* with hooks for running correctly on a standard PC without the hardware.
*
* This file was created from information in the Intel MPS version 1.4
* document, order number 242016-004, which can be ordered from the
* Intel literature center.
*/
#ifndef _SMP_IMPS_H
#define _SMP_IMPS_H
/* make sure "apic.h" is included */
#ifndef _APIC_H
#endif /* !_APIC_H */
/*
* Defines used.
*/
#ifdef IMPS_DEBUG
#else /* !IMPS_DEBUG */
#define IMPS_DEBUG_PRINT(x)
#endif /* !IMPS_DEBUG */
/*
* Defines representing limitations on values usable in different
* situations. This mostly depends on whether the APICs are old
*
* NOTE: It appears that the APICs must either be all old or all new,
* or broadcasts won't work right.
* NOTE #2: Given that, the maximum ID which can be sent to predictably
* is 14 for new APICs and 254 for old APICs. So, this all implies that
* a maximum of 15 processors is supported with the new APICs, and a
* maximum of 255 processors with the old APICs.
*/
#define IMPS_APIC_ID(x) \
/*
* This is the value that must be in the "sig" member of the MP
* Floating Pointer Structure.
*/
/*
* This is the value that must be in the "sig" member of the MP
* Configuration Table Header.
*/
/*
* These are the "type" values for Base MP Configuration Table entries.
*/
#define IMPS_BCT_PROCESSOR 0
#define IMPS_INT_INT 0
/*
* Typedefs and data item definitions done here.
*/
/*
* Data structures defined here
*/
/*
* MP Floating Pointer Structure (fps)
*
* Look at page 4-3 of the MP spec for the starting definitions of
* this structure.
*/
struct imps_fps
{
unsigned sig;
unsigned char length;
unsigned char spec_rev;
unsigned char checksum;
};
/*
* MP Configuration Table Header (cth)
*
* Look at page 4-5 of the MP spec for the starting definitions of
* this structure.
*/
struct imps_cth
{
unsigned sig;
unsigned short base_length;
unsigned char spec_rev;
unsigned char checksum;
unsigned oem_table_ptr;
unsigned short oem_table_size;
unsigned short entry_count;
unsigned lapic_addr;
unsigned short extended_length;
unsigned char extended_checksum;
};
/*
* Base MP Configuration Table Types. They are sorted according to
* type (i.e. all of type 0 come first, etc.). Look on page 4-6 for
* the start of the descriptions.
*/
struct imps_processor
{
unsigned char apic_id;
unsigned char apic_ver;
unsigned char flags;
unsigned signature;
unsigned features;
};
struct imps_bus
{
unsigned char id;
};
struct imps_ioapic
{
unsigned char id;
unsigned char ver;
unsigned char flags;
unsigned addr;
};
struct imps_interrupt
{
unsigned char int_type;
unsigned short flags;
unsigned char source_bus_id;
unsigned char source_bus_irq;
unsigned char dest_apic_id;
unsigned char dest_apic_intin;
};
/*
* Exported globals here.
*/
/*
* This is the primary function for probing for Intel MPS 1.1/1.4
* compatible hardware and BIOS information. While probing the CPUs
* information returned from the BIOS, this also starts up each CPU
* and gets it ready for use.
*
* Call this during the early stages of OS startup, before memory can
* be messed up.
*
* Returns 1 if IMPS information was found and is valid, else 0.
*/
int imps_probe (void);
/*
* Defines that use variables
*/
#define IMPS_LAPIC_WRITE(x, y) \
(*((volatile unsigned *) (imps_lapic_addr+(x))) = (y))
#endif /* !_SMP_IMPS_H */