mcamd_patounum.c revision 4156fc34b973159b0334e05ae5ec19344487bdc0
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * CDDL HEADER START
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8b464eb836173b92f2b7a65623cd06c8c3c59289mec * Common Development and Distribution License (the "License").
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * You may not use this file except in compliance with the License.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * See the License for the specific language governing permissions
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8b464eb836173b92f2b7a65623cd06c8c3c59289mec * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
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8b464eb836173b92f2b7a65623cd06c8c3c59289mec * CDDL HEADER END
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
193974072f41a843678abf5f61979c748687e66bSherry Moore * Use is subject to license terms.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec#pragma ident "%Z%%M% %I% %E% SMI"
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * Given a physical address and an optional syndrome, determine the
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * name of the memory module that contains it.
aa59c4cb15a6ac5d4e585dadf7a055b580abf579rsb ((val) & (((2ULL << (high)) - 1) & ~((1ULL << (low)) - 1)))
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * iaddr_gen generates a "normalized" DRAM controller input address
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * from a system address (physical address) if it falls within the
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * mapped range for this memory controller. Normalisation is
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * performed by subtracting the node base address from the system address,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * allowing from hoisting, and excising any bits being used in node
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * interleaving.
8b464eb836173b92f2b7a65623cd06c8c3c59289meciaddr_gen(struct mcamd_hdl *hdl, mcamd_node_t *mc, uint64_t pa,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec uint64_t mcnum, base, lim, dramaddr, ilen, ilsel, top, holesz;
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_ERR, "iaddr_gen: failed to "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "lookup required properties");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * A node with no mapped memory (no active chip-selects is usually
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * mapped with base and lim both zero. We'll cover that case and
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * any other where the range is 0.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "iaddr_gen: PA 0x%llx not "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * Rev E and later added the DRAM Hole Address Register for
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * memory hoisting. In earlier revisions memory hoisting is
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * achieved by following some algorithm to modify the CS bases etc,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * and this pa to unum algorithm will simply see those modified
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * values. But if the Hole Address Register is being used then
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * we need to reduce any address at or above 4GB by the size of
da6c28aaf62fa55f0fdb8004aa40f88f23bf53f0amw * the hole.
da6c28aaf62fa55f0fdb8004aa40f88f23bf53f0amw mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "iaddr_gen: dram hole "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "valid; pa decremented from 0x%llx to 0x%llx for "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec if (ilen != 0) {
8b464eb836173b92f2b7a65623cd06c8c3c59289mec if ((pailsel = BITS(pa, 14, 12) >> 12 & ilen) != ilsel) {
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "PA 0x%llx in a %d-way node interleave indicates "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "selection %d, MC %d has ilsel of %d\n",
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "iaddr_gen: PA 0x%llx in range "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "[0x%llx, 0x%llx] of MC %d; normalized address for cs compare "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec return (0);
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * cs_match determines whether the given DRAM controller input address
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * would be responded to by the given chip-select (which may or may not
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * be interleaved with other chip-selects). Since we include nodes
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * for spare chip-selects (if any) and those marked TestFail (if any)
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * we must check chip-select-bank-enable.
8b464eb836173b92f2b7a65623cd06c8c3c59289meccs_match(struct mcamd_hdl *hdl, uint64_t iaddr, mcamd_node_t *cs)
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_ERR, "cs_match: failed to lookup "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "required properties\n");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec return (0);
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "cs_match: iaddr 0x%llx "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "does %smatch CS %d (base 0x%llx, mask 0x%llx)\n", iaddr,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "cs_match: iaddr 0x%llx "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * Given a chip-select node determine whether it has been substituted
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * by the online spare chip-select.
8b464eb836173b92f2b7a65623cd06c8c3c59289meccs_sparedto(struct mcamd_hdl *hdl, mcamd_node_t *cs, mcamd_node_t *mc)
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_ERR, "cs_sparedto: failed to "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "lookup required properties\n");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec if ((badcsnum == MC_INVALNUM && sparecsnum == MC_INVALNUM) ||
8b464eb836173b92f2b7a65623cd06c8c3c59289mec if (!mcamd_get_numprop(hdl, cs, MCAMD_PROP_NUM, &tmpcsnum)) {
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "fail to lookup csnum - cannot reroute to spare\n");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "cs_sparedto: cs#%d is "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_ERR, "cs_sparedto: cs#%d is "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "redirected but cannot find spare cs# - cannout reroute to "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * Having determined which node and chip-select an address maps to,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * as well as whether it is a dimm1, dimm2 or dimm1/dimm2 pair
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * involved, fill the unum structure including an optional dimm offset
8b464eb836173b92f2b7a65623cd06c8c3c59289mecunum_fill(struct mcamd_hdl *hdl, mcamd_node_t *cs, int which,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_ERR, "unum_fill: failed to "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "lookup required properties\n");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec !mcamd_get_numprop(hdl, cs, MCAMD_PROP_CSDIMM1, &dimm1) ||
8b464eb836173b92f2b7a65623cd06c8c3c59289mec !mcamd_get_numprop(hdl, cs, MCAMD_PROP_CSDIMM2, &dimm2)) {
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_ERR, "unum_fill: failed to "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "lookup dimm1/dimm2 properties\n");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec for (i = 0; i < MC_UNUM_NDIMM; i++) {
8b464eb836173b92f2b7a65623cd06c8c3c59289mec switch (which) {
8b464eb836173b92f2b7a65623cd06c8c3c59289mec return (0);
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * We wish to calculate a dimm offset. In the paired case we will
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * lookup dimm1 (see offsetdimm above).
8b464eb836173b92f2b7a65623cd06c8c3c59289mec for (dimm = mcamd_dimm_next(hdl, mc, NULL); dimm != NULL;
8b464eb836173b92f2b7a65623cd06c8c3c59289mec if (!mcamd_get_numprop(hdl, dimm, MCAMD_PROP_NUM, &dnum)) {
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "to lookup dimm number property\n");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_ERR, "unum_fill: failed to "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "find dimm with number %d for offset calculation\n",
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * mc_pa_to_offset sets the offset to an invalid value if
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * it hits an error.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec (void) mc_pa_to_offset(hdl, mc, cs, iaddr, &unump->unum_offset);
8b464eb836173b92f2b7a65623cd06c8c3c59289mec return (0);
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * We have translated a system address to a (node, chip-select), and wish
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * to determine the associated dimm or dimms.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * A (node, chip-select) pair identifies one (in 64-bit MC mode) or two (in
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * 128-bit MC mode) DIMMs. In the case of a single dimm it is usually in a
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * lodimm (channel A) slot, but if mismatched dimm support is present it may
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * be an updimm (channel B).
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * Where just one dimm is associated with the chip-select we are done.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * Where there are two dimms associated with the chip-select we can
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * use the ECC type and/or syndrome to determine which of the pair we
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * resolve to, if the error is correctable. If the error is uncorrectable
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * then in 64/8 ECC mode we can still resolve to a single dimm (since ECC
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * is calculated and checked on each half of the data separately), but
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * in ChipKill mode we cannot resolve down to a single dimm.
8b464eb836173b92f2b7a65623cd06c8c3c59289mecmc_whichdimm(struct mcamd_hdl *hdl, mcamd_node_t *cs, uint64_t pa,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * Read the associated dimm instance numbers. The provider must
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * assure that if there is just one dimm then it is in the first
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * property, and if there are two then the first must be on
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * channel A.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_ERR, "mc_whichdimm: failed to "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "lookup required properties");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec ndimm = (dimm1 != MC_INVALNUM) + (dimm2 != MC_INVALNUM);
8b464eb836173b92f2b7a65623cd06c8c3c59289mec if (ndimm == 0) {
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_ERR, "mc_whichdimm: found no "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "dimms associated with chip-select");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "mc_whichdimm: just one "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "dimm associated with this chip-select");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * 64/8 ECC is checked separately for the upper and lower
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * halves, so even an uncorrectable error is contained within
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * one of the two halves. If we have sufficient address resolution
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * then we can determine which DIMM.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "mc_whichdimm: 64/8 "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "ECC in 128-bit mode, PA 0x%llx is in %s half\n",
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "64/8 ECC in 128-bit mode, PA 0x%llx with least "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "significant valid bit %d cannot be resolved to "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * ChipKill ECC
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * A correctable ChipKill syndrome and we can tell
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * which half the error was in from the symbol number.
cd64d6e9f50d70599efa5c3e990d0f88efbe4351mec * An uncorrectable error while in ChipKill ECC mode - can't
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * tell which dimm or dimms the errors lie within.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "uncorrectable ChipKill, could be either LODIMM "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "or UPDIMM\n");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * Brute-force BKDG pa to cs translation, coded to look as much like the
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * BKDG code as possible.
8b464eb836173b92f2b7a65623cd06c8c3c59289mecmc_bkdg_patounum(struct mcamd_hdl *hdl, mcamd_node_t *mc, uint64_t pa,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * Raw registers as per BKDG
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * Variables as per BKDG
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mc, MCAMD_PROP_REV, &rev, NULL) || !mcamd_get_cfgregs(hdl,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_ERR, "mc_bkdg_patounm: failed "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "to lookup required properties and registers\n");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * BKDG line to skip Why
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * F1Offset = ... Register already read,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * DramBase = Get_PCI() and retrieved above.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * DramEn = ... Function only called for enabled nodes.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec /* DramLimit = Get_PCI() Retrieved above */
8b464eb836173b92f2b7a65623cd06c8c3c59289mec /* HoleEn = ... Retrieved above */
8b464eb836173b92f2b7a65623cd06c8c3c59289mec if (!(DramBase <= SystemAddr && SystemAddr <= DramLimit)) {
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "SystemAddr 0x%x derived from PA 0x%llx is not in the "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "address range [0x%x, 0x%x] of MC %d\n",
8b464eb836173b92f2b7a65623cd06c8c3c59289mec /* not this node */
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "Node interleaving, MC node %d not selected\n",
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "failed to read cs registers\n");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * BKDG line to skip Why
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * F2Offset = Register already read,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * F2MaskOffset (rev F) Register already read
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * CSBase = Register already read
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * CSEn = We only keep enabled cs.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec /* CSMask = Get_PCI() Retrieved above */
8b464eb836173b92f2b7a65623cd06c8c3c59289mec /* CSMask = Get_PCI() Retrieved above */
8b464eb836173b92f2b7a65623cd06c8c3c59289mec if (CSEn && (InputAddr & ~CSMask) == (CSBase & ~CSMask)) {
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * The BKDG algorithm drops low-order bits that
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * are unimportant in deriving chip-select but are
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * included in row/col/bank mapping, so do not
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * perform offset calculation in this case.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec return (0);
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_ERR, "mc_bkdg_patounum: in range "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * Called for each memory controller to see if the given address is
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * mapped to this node (as determined in iaddr_gen) and, if so, which
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * chip-select on this node responds.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec/*ARGSUSED*/
8b464eb836173b92f2b7a65623cd06c8c3c59289mecmc_patounum(struct mcamd_hdl *hdl, mcamd_node_t *mc, uint64_t pa,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec uint8_t valid_lo, uint32_t synd, int syndtype, mc_unum_t *unump)
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * We perform the translation twice, once using the brute-force
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * approach of the BKDG and again using a more elegant but more
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * difficult to review against the BKDG approach.
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "BKDG brute-force method begins\n");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "BKDG brute-force method ends\n");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * If the spare chip-select has been swapped in for the one just
da6c28aaf62fa55f0fdb8004aa40f88f23bf53f0amw * matched then it is really the spare that we are after. Note that
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * when the swap is done the csbase, csmask and CSBE of the spare
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * rank do not change - accesses to the bad rank (as nominated in
8b464eb836173b92f2b7a65623cd06c8c3c59289mec * the Online Spare Control Register) are redirect to the spare.
dc32d872cbeb56532bcea030255db9cd79bac7daJosef 'Jeff' Sipek if ((sparecs = cs_sparedto(hdl, cs, mc)) != NULL) {
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "bkdgres=%d res=0\n", bkdgres);
8b464eb836173b92f2b7a65623cd06c8c3c59289mec /* offset is not checked - see note in BKDG algorithm */
8b464eb836173b92f2b7a65623cd06c8c3c59289mec if (bkdgres != 0) {
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_ERR, "BKDG alg failed while "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "ours succeeded\n");
8b464eb836173b92f2b7a65623cd06c8c3c59289mec } else if (!(unump->unum_board == bkdg_unum.unum_board &&
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "BKDG: node %d mc %d cs %d dimm(s) %d/%d\n"
8b464eb836173b92f2b7a65623cd06c8c3c59289mec "Ours: node 5d mc %d cs %d dimm(s) %d/%d\n",
da6c28aaf62fa55f0fdb8004aa40f88f23bf53f0amw bkdg_unum.unum_chip, bkdg_unum.unum_mc, bkdg_unum.unum_cs,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec#endif /* DEBUG */
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "Result: chip %d mc %d cs %d "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec return (0);
8b464eb836173b92f2b7a65623cd06c8c3c59289mecmcamd_patounum(struct mcamd_hdl *hdl, mcamd_node_t *root, uint64_t pa,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec uint8_t valid_hi, uint8_t valid_lo, uint32_t synd, int syndtype,
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "mcamd_patounum: pa=0x%llx, "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "mcamd_patounum: require "
8b464eb836173b92f2b7a65623cd06c8c3c59289mec return (0);