/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2008 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#include <cmd.h>
#include <string.h>
#include <cmd_hc_sun4v.h>
/* Using a global variable is safe because the DE is single threaded */
nvlist_t *
char *t, *s;
return (flt); /* already has location value */
/* Replace occurrence of ": " with "/" to avoid confusing ILOM. */
if (s != NULL) {
(void) strcat(t, "/");
(void) strcat(t, s + 2);
} else {
}
/* Also, remove any J number from end of this string. */
s = strstr(t, "/J");
if (s != NULL)
*s = '\0';
return (flt);
}
typedef struct tr_ent {
const char *nac_component;
const char *hc_component;
} tr_ent_t;
{ "MB", "motherboard" },
{ "CPU", "cpuboard" },
{ "MEM", "memboard" },
{ "CMP", "chip" },
{ "BR", "branch" },
{ "CH", "dram-channel" },
{ "R", "rank" },
{ "D", "dimm" }
};
int
map_name(const char *p) {
int i;
for (i = 0; i < tr_tbl_n; i++) {
return (i);
}
return (-1);
}
int
{
int num = 0;
cptr++;
}
return (num);
}
/*
* This version of breakup_components assumes that all component names which
* it sees are of the form: <nonnumeric piece><numeric piece>
* i.e. no embedded numerals in component name which have to be spelled out.
*/
int
{
i = 0;
continue; /* skip names that don't map */
if (instlen == 0) {
} else {
}
tr_tbl[j].hc_component) != 0 ||
return (-1);
i++;
}
return (1);
}
char *
fru_loc);
}
}
}
nvlist_t *
int n, i, len;
return (NULL);
return (NULL);
for (i = 0; i < n; i++) {
(void) nvlist_alloc(&hc_list[i],
}
for (i = 0; i < n; i++) {
nvlist_free(hc_list[i]);
}
return (NULL);
}
for (i = 0; i < n; i++) {
nvlist_free(hc_list[i]);
}
return (NULL);
}
for (i = 0; i < n; i++) {
nvlist_free(hc_list[i]);
}
return (NULL);
}
for (i = 0; i < n; i++) {
nvlist_free(hc_list[i]);
}
return (NULL);
}
return (fru);
}
nvlist_t *
{
return (NULL);
return (NULL);
return (flt);
}
/* find_mb -- find hardware platform motherboard within libtopo */
/* ARGSUSED */
static int
{
int err;
char *name;
uint_t n;
return (TOPO_WALK_NEXT); /* no resource, try next */
}
return (TOPO_WALK_NEXT);
}
return (TOPO_WALK_NEXT);
}
return (TOPO_WALK_NEXT); /* not MB hc list, try next */
}
return (TOPO_WALK_TERMINATE); /* if no space, give up */
}
/* init_mb -- read hardware platform motherboard from libtopo */
nvlist_t *
{
int err;
return (NULL);
== NULL) {
return (NULL);
}
return (mb_nvl);
}
/*ARGSUSED*/
static int
{
int err;
uint_t n;
char **sn;
return (TOPO_WALK_NEXT); /* no resource, try next */
}
FM_FMRI_HC_SERIAL_ID, &sn, &n) != 0) {
return (TOPO_WALK_NEXT);
}
return (TOPO_WALK_NEXT);
}
return (TOPO_WALK_TERMINATE); /* if no space, give up */
}
/*ARGSUSED*/
static int
{
int err;
char *sn;
return (TOPO_WALK_NEXT); /* no fru, try next */
}
return (TOPO_WALK_NEXT);
}
return (TOPO_WALK_NEXT);
}
return (TOPO_WALK_TERMINATE); /* if no space, give up */
}
/* cmd_find_dimm_by_sn -- find fmri by sn from libtopo */
nvlist_t *
{
int err;
return (NULL);
return (NULL);
}
} else {
return (NULL);
}
}
return (dimm_nvl);
}
typedef struct cpuid {
} cpuid_t;
/*ARGSUSED*/
static int
{
int err;
uint_t n;
return (TOPO_WALK_NEXT); /* no rsc, try next */
}
return (TOPO_WALK_NEXT);
}
return (TOPO_WALK_NEXT);
}
return (TOPO_WALK_NEXT);
}
return (TOPO_WALK_NEXT);
}
return (TOPO_WALK_NEXT);
}
return (TOPO_WALK_TERMINATE); /* if no space, give up */
}
nvlist_t *
{
int err;
return (NULL);
return (NULL);
}
return (rsc_nvl);
}
nvlist_t *
{
return (rsc);
return (rsc);
}
/*ARGSUSED*/
static int
{
int err;
char *sn;
return (TOPO_WALK_NEXT); /* no rsc, try next */
}
return (TOPO_WALK_NEXT);
}
return (TOPO_WALK_NEXT);
}
return (TOPO_WALK_TERMINATE); /* if no space, give up */
}
nvlist_t *
{
int err;
return (NULL);
return (NULL);
}
return (rsc_nvl);
}
nvlist_t *
{
char *sn;
uint_t n;
char **snarray;
/*
* T1 platform fru is in mem scheme
*/
&snarray, &n) == 0)
return (NULL);
}
int
{
char *unum;
return (1);
}
return (0);
}
nvlist_t *
{
/*
* For T1 platform fault.memory.bank and fault.memory.dimm,
* do not issue the hc schmem for resource and fru
*/
return (fllist);
}
/*
* Need to append the phyaddr & offset into the
* hc-specific of the fault.memory.page resource
*/
if (nvlist_lookup_uint64(asru,
FM_FMRI_MEM_PHYSADDR, &phyaddr) == 0)
(void) (nvlist_add_uint64(hsp,
phyaddr));
if (nvlist_lookup_uint64(asru,
FM_FMRI_MEM_OFFSET, &offset) == 0)
(void) nvlist_add_uint64(hsp,
(void) nvlist_add_nvlist(rsrc,
}
}
} else {
}
return (fllist);
}