/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2008 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* A faulty Tomatillo hostbridge may cause:
*
* - um: jbus unmapped address error.
* - to: jbus timeout.
* - bus: jbus bus error.
* - iis: illegal coherency install state error.
* - inval: iommu invalid entry error.
* - prot: iommu protection error, attempted to write a read-only page.
* - bva: iommu bad virtual address, address out of range.
* - btt: iommu bad tsb size tbw size combination.
* - srds: snoop error due to own RDS hitting cache line in S, O or M.
* - srdsa: snoop error due to own RDSA hitting cache line in S, O or M.
* - sown: snoop error due to own OWN hitting cache line in S or M.
* - srdo: snoop error due to own RDO hitting cache line in O or M.
*
* The um, to, bus, btt, inval, prot and bva errors can cause a target abort to
* be sent onto the pci bus in response to a dma request. We represent this
* using a device-ta error to propagate into the generic pci.esc rules.
*/
/*
* A faulty CPU may cause:
*
* - to: jbus timeout error.
* - bus: jbus bus error.
* - ibe: illegal byte enable error.
* - iis: illegal coherency install state error.
* - um: jbus unmapped error.
* - srd: foreign RD hitting cache line in S, O or M.
* - bc: bad jbus command.
*
* The ibe error can cause a target abort to
* be sent onto the pci bus in response to a dma request. We represent this
* using a device-ta error to propagate into the generic pci.esc rules.
*/
/*
* A faulty host bus may cause:
*
* - ape: jbus address parity error.
* - pwpe: jbus PIO write parity error.
* - drpe: jbus DMA read parity error.
* - dwpe: jbus DMA write parity error.
* - cpe: jbus control parity error.
*
* The drpe error can cause a target abort to
* be sent onto the pci bus in response to a dma request. We represent this
* using a device-ta error to propagate into the generic pci.esc rules.
*/
/*
* A faulty PCI device may cause:
*
* - rl: it to exceed the limit on retrying a transaction.
* - tto: it to not assert trdy# within the set timeout.
*
* For rl and tto, there may be a target- ereport on a child device. For rl,
* there may also be an associated dto - the retry-to-d error propagates into
* the pci.esc rules to handle this.
*/
/*
* Need to add the following tomatillo specific propagations to complete the
* fault tree. These are to allow propagations to secondary errors and cpu
* bus errors, and to represent the way the chip raises rserr
* on detection of SERR#
*/
/*
*
* - inval: iommu invalid entry error.
* - prot: iommu protection error, attempted to write a read-only page.
* - bva: iommu bad virtual address, address out of range.
* - btt: iommu bad tsb size tbw size combination.
*/
/*
* Upset used to hide ereports that can not be currently diagnosed.
*
* The ue, to and drue errors can cause a target abort to
* be sent onto the pci bus in response to a dma request. We represent this
* using a device-ta error to propagate into the generic pci.esc rules.
*/