/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* or http://www.opensolaris.org/os/licensing.
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2008 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
#pragma dictionary "SUN4U"
#define AGENT_ID_MASK 0x1f
#define AGENT_ID_SHIFT 24
#define HB_FIT 1000
#define HBUS_FIT 1000
#define PCI_BUS_FIT 500
#define PCI_DEV_FIT 1000
#define CPU_FIT 500
#define PCI_HB_DEV_PATH hostbridge/pcibus/pcidev[32]/pcifn[0]
fru hostbridge;
asru hostbridge;
event fault.io.psycho@hostbridge,
FITrate=HB_FIT, FRU=hostbridge, ASRU=hostbridge;
event error.io.psy.ecc.thresh@hostbridge;
event ereport.io.psy.ecc.pue@hostbridge{within(5s)};
event ereport.io.psy.ecc.s-pue@hostbridge{within(5s)};
event ereport.io.psy.ecc.thresh@hostbridge;
/*
* A faulty Psycho hostbridge may cause:
*
* - pue: the psycho to detect a PIO uncorrectable error, bad reader.
* - s-pue: the psycho to detect a secondary PIO UE, bad reader.
* - ecc: the SERD engine to gather enough PIO CEs to generate an ereport.
*/
prop fault.io.psycho@hostbridge (0)->
ereport.io.psy.ecc.pue@hostbridge,
ereport.io.psy.ecc.s-pue@hostbridge,
error.io.psy.ecc.thresh@hostbridge;
engine serd.io.psycho.ecc@hostbridge,
N=3, T=1day, method=persistent,
trip=ereport.io.psy.ecc.thresh@hostbridge;
event upset.io.psycho@hostbridge,
engine=serd.io.psycho.ecc@hostbridge;
event ereport.io.psy.ecc.pce@hostbridge{within(5s)};
event ereport.io.psy.ecc.s-pce@hostbridge{within(5s)};
prop error.io.psy.ecc.thresh@hostbridge (2)->
ereport.io.psy.ecc.thresh@hostbridge,
ereport.io.psy.ecc.pce@hostbridge;
/*
* An upset Psycho may cause:
*
* - pce: the psycho to detect a PIO correctable error, bad reader.
*/
prop upset.io.psycho@hostbridge (0)->
ereport.io.psy.ecc.pce@hostbridge;
event fault.io.hbus@hostbridge,
FITrate=HBUS_FIT, FRU=hostbridge, ASRU=hostbridge;
/*
* A faulty host bus may cause:
*
* - pue: a PIO uncorrectable error.
* - s-pue: a secondary PIO UE.
* - ecc: the SERD engine to gather enough PIO CEs to generate an ereport.
*/
prop fault.io.hbus@hostbridge (0)->
ereport.io.psy.ecc.pue@hostbridge,
ereport.io.psy.ecc.s-pue@hostbridge,
error.io.psy.ecc.thresh@hostbridge;
fru cpu;
event fault.io.datapath@cpu, retire=0,
FITrate=CPU_FIT, FRU=cpu;
event error.io.cpu.ecc.thresh@cpu;
/*
* A faulty CPU may cause:
*
* - pue: a PIO uncorrectable error, where the captured Agentid matches
* the cpuid.
* - ecc: the SERD engine for the CPU to fire due to PIO CEs from this
* CPU
*/
prop fault.io.datapath@cpu[cpuid] (0)->
ereport.io.psy.ecc.pue@hostbridge
{((payloadprop("ecc-afsr") >> AGENT_ID_SHIFT) & AGENT_ID_MASK) == cpuid};
prop fault.io.datapath@cpu (0)->
error.io.cpu.ecc.thresh@cpu;
prop error.io.cpu.ecc.thresh@cpu (1)->
ereport.io.psy.ecc.thresh@hostbridge<>;
prop error.io.cpu.ecc.thresh@cpu[cpuid] (1)->
ereport.io.psy.ecc.pce@hostbridge<>
{((payloadprop("ecc-afsr") >> AGENT_ID_SHIFT) & AGENT_ID_MASK) == cpuid};
asru pcibus/pcidev/pcifn;
fru pcibus/pcidev;
event fault.io.pci.device-interr@hostbridge/pcibus/pcidev/pcifn,
FITrate=PCI_DEV_FIT, FRU=pcibus/pcidev, ASRU=pcibus/pcidev/pcifn;
event fault.io.pci.device-interr@pcibus/pcidev/pcifn,
FITrate=PCI_DEV_FIT, FRU=pcibus/pcidev, ASRU=pcibus/pcidev/pcifn;
event error.io.psy.pbm.rl@hostbridge/pcibus/pcidev/pcifn;
event error.io.psy.pbm.rl@pcibus/pcidev/pcifn;
event error.io.psy.pbm.rl@pcibus/pcidev/pcifn/pcibus/pcidev/pcifn;
event error.io.psy.pbm.target-rl@pcibus/pcidev/pcifn;
event error.io.psy.pbm.target-rl@pcibus/pcidev/pcifn/pcibus/pcidev/pcifn;
event error.io.pci.ma-u@hostbridge/pcibus/pcidev/pcifn;
event error.io.pci.perr-pw-u@hostbridge/pcibus/pcidev/pcifn;
event error.io.pci.perr-dw-u@hostbridge/pcibus/pcidev/pcifn;
event error.io.pci.dpdata-dr-u@hostbridge/pcibus/pcidev/pcifn;
event error.io.pci.ta-u@hostbridge/pcibus/pcidev/pcifn;
event error.io.pci.serr-u@hostbridge/pcibus/pcidev/pcifn;
event error.io.pci.retry-to-d@hostbridge/pcibus/pcidev/pcifn;
event error.psy.cpu.berr@cpu;
event ereport.io.psy.sbh@hostbridge/pcibus/pcidev/pcifn{within(5s)};
event ereport.io.psy.pbm.rl@hostbridge/pcibus/pcidev/pcifn{within(5s)};
event ereport.io.psy.pbm.s-rl@hostbridge/pcibus/pcidev/pcifn{within(5s)};
event ereport.io.psy.pbm.s-ma@hostbridge/pcibus/pcidev/pcifn{within(5s)};
event ereport.io.psy.pbm.s-rta@hostbridge/pcibus/pcidev/pcifn{within(5s)};
event ereport.io.psy.pbm.s-mdpe@hostbridge/pcibus/pcidev/pcifn{within(5s)};
event ereport.io.psy.pbm.target-rl@pcibus/pcidev/pcifn{within(5s)};
event ereport.io.pci.rserr@hostbridge/pcibus/pcidev/pcifn{within(5s)};
event ereport.cpu.ultraSPARC-II.berr@cpu{within(5s)};
/*
* A faulty PCI device may cause:
*
* - rl: it to retry a transaction beyond the specified limit.
* - sbh: it to generate a streaming byte hole.
*
* For rl, there may be a target-rl ereport on a child device. There may also be
* an associated dto - the retry-to-d error propagates into the pci.esc rules
* to handle this.
*/
prop fault.io.pci.device-interr@pcibus/pcidev[fromdev]/pcifn (0)->
error.io.psy.pbm.rl@pcibus/pcidev<todev>/pcifn {
fromdev == todev && fromdev != 32 },
error.io.psy.pbm.target-rl@pcibus/pcidev<todev>/pcifn {
fromdev == todev && fromdev != 32 };
prop error.io.psy.pbm.rl@pcibus/pcidev/pcifn/pcibus/pcidev/pcifn (1)->
error.io.psy.pbm.rl@pcibus/pcidev/pcifn;
prop error.io.psy.pbm.rl@hostbridge/pcibus/pcidev/pcifn (1)->
ereport.io.psy.pbm.rl@PCI_HB_DEV_PATH,
ereport.io.psy.pbm.s-rl@PCI_HB_DEV_PATH;
prop error.io.psy.pbm.target-rl@pcibus/pcidev/pcifn (1)->
error.io.psy.pbm.target-rl@pcibus/pcidev/pcifn/pcibus<>/pcidev<>/pcifn<>;
prop error.io.psy.pbm.target-rl@pcibus/pcidev/pcifn (0)->
ereport.io.psy.pbm.target-rl@pcibus/pcidev/pcifn;
prop error.io.psy.pbm.rl@hostbridge/pcibus/pcidev/pcifn (0)->
error.io.pci.retry-to-d@hostbridge/pcibus/pcidev/pcifn;
prop error.io.psy.pbm.rl@hostbridge/pcibus/pcidev/pcifn (0)->
error.psy.cpu.berr@cpu;
prop fault.io.pci.device-interr@hostbridge/pcibus/pcidev/pcifn (0)->
ereport.io.psy.sbh@PCI_HB_DEV_PATH;
/*
* Need to add the following psycho specific propagations to complete the PCI
* fault tree. These are to allow propagations to secondary errors and cpu
* bus errors, and to represent the way the chip raises rserr
* on detection of SERR#
*/
prop error.io.pci.ma-u@hostbridge/pcibus/pcidev/pcifn (0)->
ereport.io.psy.pbm.s-ma@PCI_HB_DEV_PATH;
prop error.io.pci.ta-u@hostbridge/pcibus/pcidev/pcifn (0)->
ereport.io.psy.pbm.s-rta@PCI_HB_DEV_PATH;
prop error.io.pci.perr-pw-u@hostbridge/pcibus/pcidev/pcifn (0)->
ereport.io.psy.pbm.s-mdpe@PCI_HB_DEV_PATH;
prop error.io.pci.perr-dw-u@hostbridge/pcibus/pcidev/pcifn (0)->
ereport.io.psy.pbm.s-mdpe@PCI_HB_DEV_PATH;
prop error.io.pci.dpdata-dr-u@hostbridge/pcibus/pcidev/pcifn (0)->
ereport.io.psy.pbm.s-mdpe@PCI_HB_DEV_PATH;
prop error.io.pci.ta-u@hostbridge/pcibus/pcidev/pcifn (0)->
error.psy.cpu.berr@cpu;
prop error.io.pci.dpdata-dr-u@hostbridge/pcibus/pcidev/pcifn (0)->
error.psy.cpu.berr@cpu;
prop error.io.pci.ma-u@hostbridge/pcibus/pcidev/pcifn (0)->
error.psy.cpu.berr@cpu;
prop error.psy.cpu.berr@cpu (0)->
ereport.cpu.ultraSPARC-II.berr@cpu;
prop error.io.pci.serr-u@hostbridge/pcibus/pcidev/pcifn (1)->
ereport.io.pci.rserr@PCI_HB_DEV_PATH;
event ereport.io.psy.nodiag@hostbridge;
/*
* Upset used to hide ereports that can not be currently diagnosed.
*/
engine serd.io.psy.nodiag@hostbridge,
N=1000, T=1hour, method=persistent,
trip=ereport.io.psy.nodiag@hostbridge;
event upset.io.psy.nodiag@hostbridge,
engine=serd.io.psy.nodiag@hostbridge;
prop upset.io.psy.nodiag@hostbridge (0)->
ereport.io.psy.ecc.s-pce@hostbridge,
ereport.io.psy.nodiag@hostbridge;