/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* or http://www.opensolaris.org/os/licensing.
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2008 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
/*
* Eversholt rules for Oberon ASICs
*/
#pragma dictionary "SUN4U"
#define HB_FIT 1000
/*
* Test for primary or secondary ereports
*/
#define IS_PRIMARY (payloadprop("primary"))
#define IS_SECONDARY (! payloadprop("primary"))
event error.io.oberon.pec.secondary@hostbridge/pciexrc;
event error.io.oberon.pec.fabric_error@hostbridge/pciexrc;
/*
* Ereports derived from the
* UBC Status Clear Register
*
* dmarduea-channel DMA read uncorrectable error (UE) in leaf A
* dmawtuea DMA write UE in leaf A
* memrdaxa Memory read invalid address error in leaf A
* memwtaxa Memory write invalid address error in leaf A
* dmardueb-channel DMA read uncorrectable error (UE) in leaf B
* dmawtueb DMA write UE in leaf B
* memrdaxb Memory read invalid address error in leaf B
* memwtaxb Memory write invalid address error in leaf B
* piowtue-channel PIO write UE
* piowbeue-channel PIO write byte enable UE
* piorbeue-channel PIO read byte enable UE
*/
event ereport.io.oberon.ubc.dmarduea-channel@hostbridge/pciexrc{within(5s)};
event ereport.io.oberon.ubc.dmawtuea@hostbridge/pciexrc{within(5s)};
event ereport.io.oberon.ubc.memrdaxa@hostbridge/pciexrc{within(5s)};
event ereport.io.oberon.ubc.memwtaxa@hostbridge/pciexrc{within(5s)};
event ereport.io.oberon.ubc.dmardueb-channel@hostbridge/pciexrc{within(5s)};
event ereport.io.oberon.ubc.dmawtueb@hostbridge/pciexrc{within(5s)};
event ereport.io.oberon.ubc.memrdaxb@hostbridge/pciexrc{within(5s)};
event ereport.io.oberon.ubc.memwtaxb@hostbridge/pciexrc{within(5s)};
event ereport.io.oberon.ubc.piowtue-channel@hostbridge/pciexrc{within(5s)};
event ereport.io.oberon.ubc.piowbeue-channel@hostbridge/pciexrc{within(5s)};
event ereport.io.oberon.ubc.piorbeue-channel@hostbridge/pciexrc{within(5s)};
/*
* tlueitmo TLU Egress Issue Timeout
*/
event ereport.io.oberon.pec.tlueitmo@hostbridge/pciexrc{within(5s)};
/*
* TLU Uncorrectable and Correctable ereports
*
* ecrc End-to-end CRC error
*/
event ereport.io.oberon.pec.ecrc@hostbridge/pciexrc{within(5s)};
/*
* A faulty Oberon may cause;
*
* - DMA write internal RAM UE: dmawtuea, dmawtueb
* - TLU ECRC
*
* Errors marked with * may cause PCI-E abort
*/
fru hostbridge;
asru hostbridge;
event fault.io.oberon@hostbridge,
FITrate=HB_FIT, FRU=hostbridge, ASRU=hostbridge;
prop fault.io.oberon@hostbridge (0)->
ereport.io.oberon.ubc.dmawtuea@hostbridge/pciexrc,
ereport.io.oberon.ubc.dmawtueb@hostbridge/pciexrc;
event fault.io.oberon@hostbridge/pciexrc,
FITrate=HB_FIT, FRU=hostbridge, ASRU=hostbridge;
prop fault.io.oberon@hostbridge/pciexrc (0)->
ereport.io.oberon.pec.ecrc@hostbridge/pciexrc { IS_PRIMARY };
/*
* A faulty PX nexus driver can cause
* - Jbus unmapped error
* - mmu invalid, out of range, protection etc. all except data parity
* - invalid pio r/w
* - unsolicited read or interrupt return
* - msg received to unenabled queue
*/
#define SW_FIT 5000 /* No real fit rate, SW */
event fault.io.fire.hb.sw-config@hostbridge/pciexrc, retire=0, response=0,
FITrate=SW_FIT;
prop fault.io.fire.hb.sw-config@hostbridge/pciexrc (0)->
ereport.io.oberon.ubc.memrdaxa@hostbridge/pciexrc,
ereport.io.oberon.ubc.memrdaxb@hostbridge/pciexrc,
ereport.io.oberon.ubc.memwtaxa@hostbridge/pciexrc,
ereport.io.oberon.ubc.memwtaxb@hostbridge/pciexrc;
/*
* Secondary errors of the ereport that the device is at fault.
* Undiagnosed the secondary errors since the payload is invalid.
*/
prop error.io.oberon.pec.secondary@hostbridge/pciexrc (0) ->
ereport.io.oberon.pec.ecrc@hostbridge/pciexrc{ IS_SECONDARY };
/*
* For logging purpose only.
* The px nexus driver generates equivalent pciex ereports for the
* common pciex rules to diagnose.
*/
prop error.io.oberon.pec.fabric_error@hostbridge/pciexrc(0) ->
ereport.io.oberon.pec.ecrc@hostbridge/pciexrc;
event ereport.io.oberon.nodiag@hostbridge;
/*
* Upset used to hide ereports that are not currently diagnosed.
*/
engine serd.io.oberon.nodiag@hostbridge,
N=1000, T=1s, method=persistent,
trip=ereport.io.oberon.nodiag@hostbridge;
event upset.io.oberon.nodiag@hostbridge,
engine=serd.io.oberon.nodiag@hostbridge;
prop upset.io.oberon.nodiag@hostbridge (0)->
ereport.io.oberon.ubc.dmarduea-channel@hostbridge/pciexrc,
ereport.io.oberon.ubc.dmardueb-channel@hostbridge/pciexrc,
ereport.io.oberon.ubc.piowtue-channel@hostbridge/pciexrc,
ereport.io.oberon.ubc.piowbeue-channel@hostbridge/pciexrc,
ereport.io.oberon.ubc.piorbeue-channel@hostbridge/pciexrc,
ereport.io.oberon.pec.tlueitmo@hostbridge/pciexrc,
error.io.oberon.pec.fabric_error@hostbridge/pciexrc,
ereport.io.oberon.nodiag@hostbridge;