/*
* P5020DS Device Tree Source
*
* Copyright 2010-2011 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* * Neither the name of Freescale Semiconductor nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
*
* ALTERNATIVELY, this software may be distributed under the terms of the
* GNU General Public License ("GPL") as published by the Free Software
* Foundation, either version 2 of that License or (at your option) any
* later version.
*
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* $FreeBSD$ */
/include/ "p5020si.dtsi"
/ {
model = "fsl,P5020DS";
compatible = "fsl,P5020DS";
aliases {
};
memory {
device_type = "memory";
};
};
};
};
};
};
};
};
};
};
};
};
};
};
};
};
};
};
};
};
};
};
};
};
};
spi@110000 {
flash@0 {
compatible = "spansion,s25sl12801";
reg = <0>;
label = "u-boot";
};
label = "kernel";
};
label = "dtb";
};
label = "file system";
};
};
};
i2c@118100 {
eeprom@51 {
compatible = "at24,24c256";
reg = <0x51>;
};
eeprom@52 {
compatible = "at24,24c256";
reg = <0x52>;
};
};
i2c@119100 {
rtc@68 {
compatible = "dallas,ds3232";
reg = <0x68>;
};
};
/* Commented out, use default allocation */
/* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */
/* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */
};
/* Commented out, use default allocation */
/* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */
/* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */
};
/* Same as fsl,qman-*, use default allocation */
/* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */
};
};
reg = <0x8>;
device_type = "tbi-phy";
};
/*
* Virtual MDIO for the two on-board RGMII
* ports. The fsl,hydra-mdio-muxval property
* is already correct.
*/
compatible = "fsl,hydra-mdio";
status = "disabled";
reg = <0x0>;
};
reg = <0x1>;
};
};
/*
* Virtual MDIO for the four-port SGMII card.
* The fsl,hydra-mdio-muxval property will be
* fixed-up by U-Boot based on the slot that
* the SGMII card is in.
*
* Note: we do not support DTSEC5 connected to
* SGMII, so this is the only SGMII node.
*/
compatible = "fsl,hydra-mdio";
status = "disabled";
reg = <0x1c>;
};
reg = <0x1d>;
};
reg = <0x1e>;
};
reg = <0x1f>;
};
};
};
};
reg = <8>;
device_type = "tbi-phy";
};
};
};
reg = <8>;
device_type = "tbi-phy";
};
};
};
compatible = "fsl,fman-tbi";
reg = <8>;
device_type = "tbi-phy";
};
};
};
reg = <8>;
device_type = "tbi-phy";
};
};
/*
* phy-handle will be updated by U-Boot to
* reflect the actual slot the XAUI card is in.
*/
};
/*
* We only support one XAUI card, so the MDIO muxing
* is set by U-Boot, and Linux never touches it.
* Therefore, we don't need a virtual MDIO node.
* However, the phy address depends on the slot, so
* only one of the ethernet-phy nodes below will be
* used.
*/
status = "disabled";
/* XAUI card in slot 1 */
reg = <0x4>;
};
/* XAUI card in slot 2 */
reg = <0x0>;
};
};
};
};
port1 {
};
port2 {
};
};
compatible = "cfi-flash";
/*
* Map 64Mb of 128MB NOR flash memory. Since highest
* line of address of NOR flash memory are set by
* FPGA, memory are divided into two pages equal to
* 64MB. One of the pages can be accessed at once.
*/
};
compatible = "fsl,elbc-fcm-nand";
partition@0 {
label = "NAND U-Boot Image";
};
partition@2000000 {
label = "NAND Root File System";
};
partition@12000000 {
label = "NAND Compressed RFS Image";
};
label = "NAND Linux Kernel Image";
};
partition@1e000000 {
label = "NAND DTB Image";
};
label = "NAND Writable User area";
};
};
};
};
0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>;
pcie@0 {
0x02000000 0 0x80000000
0 0x10000000
0x01000000 0 0x00000000
0x01000000 0 0xff000000
0 0x00010000>;
};
};
0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>;
pcie@0 {
0x02000000 0 0x90000000
0 0x10000000
0x01000000 0 0x00000000
0x01000000 0 0xff010000
0 0x00010000>;
};
};
0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>;
pcie@0 {
0x02000000 0 0xa0000000
0 0x10000000
0x01000000 0 0x00000000
0x01000000 0 0xff020000
0 0x00010000>;
};
};
0x01000000 0 0x00000000 0x0 0xff030000 0 0x00010000>;
pcie@0 {
0x02000000 0 0xb0000000
0 0x08000000
0x01000000 0 0x00000000
0x01000000 0 0xff030000
0 0x00010000>;
};
};
ethernet@0 {
status = "okay";
};
ethernet@1 {
status = "disabled";
};
ethernet@2 {
status = "disabled";
};
ethernet@3 {
status = "disabled";
};
ethernet@4 {
status = "okay";
};
ethernet@5 {
status = "disabled";
};
};
chosen {
stdin = "serial0";
stdout = "serial0";
};
};