/*
* Copyright (c) 2010 The FreeBSD Foundation
* All rights reserved.
*
* This software was developed by Semihalf under sponsorship from
* the FreeBSD Foundation.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* Marvell DB-78100 Device Tree Source.
*
* $FreeBSD$
*/
/ {
model = "mrvl,DB-78100";
aliases {
};
cpus {
cpu@0 {
device_type = "cpu";
compatible = "ARM,88FR571";
reg = <0x0>;
};
};
memory {
device_type = "memory";
};
localbus@0 {
compatible = "mrvl,lbc";
/* This reflects CPU decode windows setup. */
0x1 0x3e 0xf9400000 0x00100000
0x2 0x3d 0xf9500000 0x02000000
0x3 0x3b 0xfb500000 0x00100000>;
compatible = "cfi-flash";
};
compatible = "led";
};
compatible = "cfi-flash";
};
compatible = "mrvl,nfc";
};
};
compatible = "simple-bus";
compatible = "mrvl,pic";
};
timer@20300 {
compatible = "mrvl,timer";
interrupts = <8>;
};
compatible = "mrvl,mpp";
0 2 /* MPP[0]: GE1_TXCLK */
1 2 /* MPP[1]: GE1_TXCTL */
2 2 /* MPP[2]: GE1_RXCTL */
3 2 /* MPP[3]: GE1_RXCLK */
4 2 /* MPP[4]: GE1_TXD[0] */
5 2 /* MPP[5]: GE1_TXD[1] */
6 2 /* MPP[6]: GE1_TXD[2] */
7 2 /* MPP[7]: GE1_TXD[3] */
8 2 /* MPP[8]: GE1_RXD[0] */
9 2 /* MPP[9]: GE1_RXD[1] */
10 2 /* MPP[10]: GE1_RXD[2] */
11 2 /* MPP[11]: GE1_RXD[3] */
13 3 /* MPP[13]: SYSRST_OUTn */
14 3 /* MPP[14]: SATA1_ACTn */
15 3 /* MPP[15]: SATA0_ACTn */
16 4 /* MPP[16]: UA2_TXD */
17 4 /* MPP[17]: UA2_RXD */
18 3 /* MPP[18]: <UNKNOWN> */
19 3 /* MPP[19]: <UNKNOWN> */
20 3 /* MPP[20]: <UNKNOWN> */
21 3 /* MPP[21]: <UNKNOWN> */
22 4 /* MPP[22]: UA3_TXD */
23 4 >; /* MPP[21]: UA3_RXD */
};
compatible = "mrvl,gpio";
};
rtc@10300 {
compatible = "mrvl,rtc";
};
twsi@11000 {
compatible = "mrvl,twsi";
interrupts = <2>;
};
twsi@11100 {
compatible = "mrvl,twsi";
interrupts = <3>;
};
model = "V2";
compatible = "mrvl,ge";
mdio@0 {
compatible = "mrvl,mdio";
reg = <0x8>;
};
reg = <0x9>;
};
};
};
model = "V2";
compatible = "mrvl,ge";
};
compatible = "ns16550";
interrupts = <12>;
};
compatible = "ns16550";
interrupts = <13>;
};
usb@50000 {
};
usb@51000 {
};
usb@52000 {
};
xor@60000 {
compatible = "mrvl,xor";
};
crypto@90000 {
compatible = "mrvl,cesa";
interrupts = <19>;
};
compatible = "mrvl,sata";
interrupts = <26>;
};
};
compatible = "mrvl,pcie";
device_type = "pci";
0x01000000 0x0 0x00000000 0xf1100000 0x0 0x00100000>;
interrupts = <68>;
/* IDSEL 0x1 */
>;
};
compatible = "mrvl,cesa-sram";
};
chosen {
stdin = "serial0";
stdout = "serial0";
};
};