Searched refs:TS (Results 1 - 8 of 8) sorted by relevance
| /vbox/src/VBox/VMM/VMMRC/ |
| H A D | CPUMRCA.asm | 80 ; trapping) and TS (for intercepting all fpu/mmx/sse stuff). The EM flag
87 ; TS | EM | MP | FPUInstr | WAIT :: VMM Action
89 ; 0 | 0 | 0 | Exec | Exec :: Clear TS & MP, Save HC, Load GC.
90 ; 0 | 0 | 1 | Exec | Exec :: Clear TS, Save HC, Load GC.
91 ; 0 | 1 | 0 | #NM | Exec :: Clear TS & MP, Save HC, Load GC;
92 ; 0 | 1 | 1 | #NM | Exec :: Clear TS, Save HC, Load GC.
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| H A D | TRPMRCHandlersA.asm | 94 dd 0 ; a - #TS - F - Y - Invalid TSS, Taskswitch or TSS access.
135 dd 0 ; a - #TS - F - Y - Invalid TSS, Taskswitch or TSS access.
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| /vbox/src/VBox/Devices/Graphics/shaderlib/wine/include/ |
| H A D | tmschema.h | 967 TM_STATE(1, TS, NORMAL)
968 TM_STATE(2, TS, HOT)
969 TM_STATE(3, TS, PRESSED)
970 TM_STATE(4, TS, DISABLED)
971 TM_STATE(5, TS, CHECKED)
972 TM_STATE(6, TS, HOTCHECKED)
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| /vbox/src/VBox/Additions/WINNT/Graphics/Wine/include/ |
| H A D | tmschema.h | 967 TM_STATE(1, TS, NORMAL)
968 TM_STATE(2, TS, HOT)
969 TM_STATE(3, TS, PRESSED)
970 TM_STATE(4, TS, DISABLED)
971 TM_STATE(5, TS, CHECKED)
972 TM_STATE(6, TS, HOTCHECKED)
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| /vbox/src/VBox/VMM/VMMR0/ |
| H A D | CPUMR0A.asm | 89 ; This macro ASSUMES CR0.TS is not set!
117 ; Clears CR0.TS and CR0.EM if necessary, saving the previous result.
137 ; Restore CR0.TS and CR0.EM state if SAVE_CR0_CLEAR_FPU_TRAPS change it.
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| /vbox/src/VBox/RDP/client-1.8.3/ |
| H A D | config.guess | 734 CRAY*TS:*:*:*)
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| /vbox/src/libs/libxml2-2.6.31/ |
| H A D | config.guess | 739 CRAY*TS:*:*:*)
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| /vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Include/Library/ |
| H A D | BaseLib.h | 4891 UINT32 TS:1; ///< Task Switched. member in struct:__anon11930::__anon11931
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