Searched refs:SVGA_FIFO_BUSY (Results 1 - 2 of 2) sorted by relevance
/vbox/src/VBox/Devices/Graphics/vmsvga/ |
H A D | svga_reg.h | 572 SVGA_FIFO_BUSY, /* See "FIFO Synchronization Registers" */ enumerator in enum:__anon14812 627 * from SVGA_FIFO_BUSY. 657 * If SVGA_FIFO_BUSY is available, drivers are advised to only 658 * write to SYNC if SVGA_FIFO_BUSY is FALSE. Drivers should set 659 * SVGA_FIFO_BUSY to TRUE after writing to SYNC. The MKS will 660 * eventually set SVGA_FIFO_BUSY on its own, but this approach 682 * SVGA_FIFO_BUSY -- 700 * 1. Read SVGA_FIFO_BUSY. If it reads as TRUE, no further 703 * 2. Write TRUE to SVGA_FIFO_BUSY. This informs future guest
|
/vbox/src/VBox/Devices/Graphics/ |
H A D | DevVGA-SVGA.cpp | 1017 * Safely updates the SVGA_FIFO_BUSY register (in shared memory). 1024 ASMAtomicWriteU32(&pThis->svga.CTX_SUFF(pFIFO)[SVGA_FIFO_BUSY], fState); 1034 ASMAtomicWriteU32(&pThis->svga.CTX_SUFF(pFIFO)[SVGA_FIFO_BUSY], fState != 0); 1101 Log(("configured=%d busy=%d\n", pThis->svga.fConfigured, pThis->svga.pFIFOR3[SVGA_FIFO_BUSY])); 1210 Log(("SVGA_REG_SYNC: SVGA_FIFO_BUSY=%d\n", pThis->svga.CTX_SUFF(pFIFO)[SVGA_FIFO_BUSY])); 1212 if (VMSVGA_IS_VALID_FIFO_REG(SVGA_FIFO_BUSY, pThis->svga.CTX_SUFF(pFIFO)[SVGA_FIFO_MIN])) 1836 case SVGA_FIFO_BUSY: 1837 Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_BUSY = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); 2003 if (VMSVGA_IS_VALID_FIFO_REG(SVGA_FIFO_BUSY, offFifoMi [all...] |
Completed in 52 milliseconds