/openjdk7/hotspot/agent/src/share/classes/sun/jvm/hotspot/asm/sparc/ |
H A D | SPARCV9CasInstruction.java | 31 final private SPARCRegister rs2; field in class:SPARCV9CasInstruction 35 SPARCRegister rs2, SPARCRegister rd, int dataType) { 37 this.rs2 = rs2; 50 return rs2; 34 SPARCV9CasInstruction(String name, SPARCRegisterIndirectAddress addr, SPARCRegister rs2, SPARCRegister rd, int dataType) argument
|
H A D | SPARCFPArithmeticInstruction.java | 31 final private SPARCRegister rs2; field in class:SPARCFPArithmeticInstruction 35 SPARCRegister rs1, SPARCRegister rs2, 37 super(name, opcode, rs1, rs2, rd); 38 this.rs2 = rs2; 48 buf.append(rs2.toString()); 59 return new Operand[] { rs1, rs2 }; 34 SPARCFPArithmeticInstruction(String name, int opcode, int rtlOperation, SPARCRegister rs1, SPARCRegister rs2, SPARCRegister rd) argument
|
H A D | FP2RegisterDecoder.java | 37 SPARCRegister rs1, SPARCRegister rs2, 41 Assert.that(rs2.isFloat() && rd.isFloat(), "rs2, rd have to be float registers"); 43 return factory.newFP2RegisterInstruction(name, opf, (SPARCFloatRegister)rs2, (SPARCFloatRegister)rd); 36 decodeFloatInstruction(int instruction, SPARCRegister rs1, SPARCRegister rs2, SPARCRegister rd, SPARCInstructionFactory factory) argument
|
H A D | FPMoveDecoder.java | 37 SPARCRegister rs1, SPARCRegister rs2, 41 Assert.that(rs2.isFloat() && rd.isFloat(), "rs2, rd have to be float registers"); 43 return factory.newFPMoveInstruction(name, opf, (SPARCFloatRegister)rs2, (SPARCFloatRegister)rd); 36 decodeFloatInstruction(int instruction, SPARCRegister rs1, SPARCRegister rs2, SPARCRegister rd, SPARCInstructionFactory factory) argument
|
H A D | FPArithmeticDecoder.java | 40 SPARCRegister rs1, SPARCRegister rs2, 44 Assert.that(rs1.isFloat() && rs2.isFloat() && rd.isFloat(), "rs1, rs2 and rd must be floats"); 47 (SPARCFloatRegister)rs2, 39 decodeFloatInstruction(int instruction, SPARCRegister rs1, SPARCRegister rs2, SPARCRegister rd, SPARCInstructionFactory factory) argument
|
H A D | V9CasDecoder.java | 39 SPARCRegister rs2 = SPARCRegisters.getRegister(getSourceRegister2(instruction)); 40 return v9factory.newV9CasInstruction(name, addr, rs2, rd, dataType);
|
H A D | FloatDecoder.java | 56 SPARCRegister rs1, SPARCRegister rs2, SPARCRegister rd, 73 SPARCRegister rs2 = RegisterDecoder.decode(src2Type, rs2Num); 74 if (rd == null || rs2 == null) { 78 return decodeFloatInstruction(instruction, rs1, rs2, rd, factory); 55 decodeFloatInstruction(int instruction, SPARCRegister rs1, SPARCRegister rs2, SPARCRegister rd, SPARCInstructionFactory factory) argument
|
H A D | SPARCV9FMOVrInstruction.java | 35 SPARCFloatRegister rs2, SPARCFloatRegister rd, 37 super(name, opf, rs2, rd); 34 SPARCV9FMOVrInstruction(String name, int opf, SPARCRegister rs1, SPARCFloatRegister rs2, SPARCFloatRegister rd, int regConditionCode) argument
|
H A D | V9AlternateSpaceDecoder.java | 35 SPARCRegisterIndirectAddress newRegisterIndirectAddress(SPARCRegister rs1, SPARCRegister rs2) { argument 36 return new SPARCV9RegisterIndirectAddress(rs1, rs2);
|
H A D | V9FMOVrDecoder.java | 47 SPARCRegister rs2 = RegisterDecoder.decode(dataType, rs2Num); 49 return v9factory.newV9FMOVrInstruction(name, opf, rs1, (SPARCFloatRegister)rs2,
|
H A D | MemoryInstructionDecoder.java | 34 SPARCRegisterIndirectAddress newRegisterIndirectAddress(SPARCRegister rs1, SPARCRegister rs2) { argument 35 return new SPARCRegisterIndirectAddress(rs1, rs2); 55 SPARCRegister rs2 = SPARCRegisters.getRegister(getSourceRegister2(instruction)); 56 addr = newRegisterIndirectAddress(rs1,rs2);
|
H A D | SPARCV9InstructionFactoryImpl.java | 68 SPARCRegister rs2, SPARCRegister rd, int dataType) { 69 return new SPARCV9CasInstruction(name, addr, rs2, rd, dataType); 135 SPARCRegister rs1, SPARCFloatRegister rs2, 137 return new SPARCV9FMOVrInstruction(name, opf, rs1, rs2, rd, regConditionCode); 67 newV9CasInstruction(String name, SPARCRegisterIndirectAddress addr, SPARCRegister rs2, SPARCRegister rd, int dataType) argument 134 newV9FMOVrInstruction(String name, int opf, SPARCRegister rs1, SPARCFloatRegister rs2, SPARCFloatRegister rd, int regConditionCode) argument
|
H A D | SPARCV9InstructionFactory.java | 36 SPARCRegister rs2, SPARCRegister rd, int dataType); 61 SPARCRegister rs1, SPARCFloatRegister rs2, 35 newV9CasInstruction(String name, SPARCRegisterIndirectAddress addr, SPARCRegister rs2, SPARCRegister rd, int dataType) argument 60 newV9FMOVrInstruction(String name, int opf, SPARCRegister rs1, SPARCFloatRegister rs2, SPARCFloatRegister rd, int regConditionCode) argument
|
H A D | SPARCInstructionFactoryImpl.java | 107 SPARCFloatRegister rs1, SPARCFloatRegister rs2, 109 return new SPARCFPArithmeticInstruction(name, opf, rtlOperation, rs1, rs2, rd); 106 newFPArithmeticInstruction(String name, int opf, int rtlOperation, SPARCFloatRegister rs1, SPARCFloatRegister rs2, SPARCFloatRegister rd) argument
|
H A D | SPARCInstructionFactory.java | 77 SPARCFloatRegister rs1, SPARCFloatRegister rs2, 76 newFPArithmeticInstruction(String name, int opf, int rtlOperation, SPARCFloatRegister rs1, SPARCFloatRegister rs2, SPARCFloatRegister rd) argument
|
/openjdk7/hotspot/src/cpu/sparc/vm/ |
H A D | assembler_sparc.hpp | 969 static int rs2( Register r) { return u_field(r->encoding(), 4, 0); } function in class:Assembler 1238 void addcc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(add_op3 | cc_bit_op3) | rs1(s1) | rs2(s2) ); } 1240 void addc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(addc_op3 ) | rs1(s1) | rs2(s2) ); } 1242 void addccc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(addc_op3 | cc_bit_op3) | rs1(s1) | rs2(s2) ); } 1296 void casa( Register s1, Register s2, Register d, int ia = -1 ) { v9_only(); emit_long( op(ldst_op) | rd(d) | op3(casa_op3 ) | rs1(s1) | (ia == -1 ? immed(true) : imm_asi(ia)) | rs2(s2)); } 1297 void casxa( Register s1, Register s2, Register d, int ia = -1 ) { v9_only(); emit_long( op(ldst_op) | rd(d) | op3(casxa_op3) | rs1(s1) | (ia == -1 ? immed(true) : imm_asi(ia)) | rs2(s2)); } 1301 void udiv( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(udiv_op3 ) | rs1(s1) | rs2(s2)); } 1303 void sdiv( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(sdiv_op3 ) | rs1(s1) | rs2(s2)); } 1305 void udivcc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(udiv_op3 | cc_bit_op3) | rs1(s1) | rs2(s2)); } 1307 void sdivcc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(sdiv_op3 | cc_bit_op3) | rs1(s1) | rs2(s [all...] |
H A D | assembler_sparc.inline.hpp | 79 inline void Assembler::add(Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(add_op3) | rs1(s1) | rs2(s2) ); } 102 inline void Assembler::cbcond(Condition c, CC cc, Register s1, Register s2, Label& L) { cti(); no_cbcond_before(); emit_data(op(branch_op) | cond_cbcond(c) | op2(bpr_op2) | branchcc(cc) | wdisp10(intptr_t(target(L)), intptr_t(pc())) | rs1(s1) | rs2(s2)); } 108 inline void Assembler::flush( Register s1, Register s2) { emit_long( op(arith_op) | op3(flush_op3) | rs1(s1) | rs2(s2)); } 111 inline void Assembler::jmpl( Register s1, Register s2, Register d ) { cti(); emit_long( op(arith_op) | rd(d) | op3(jmpl_op3) | rs1(s1) | rs2(s2)); has_delay_slot(); } 119 inline void Assembler::ldf(FloatRegisterImpl::Width w, Register s1, Register s2, FloatRegister d) { emit_long( op(ldst_op) | fd(d, w) | alt_op3(ldf_op3, w) | rs1(s1) | rs2(s2) ); } 124 inline void Assembler::ldfsr( Register s1, Register s2) { v9_dep(); emit_long( op(ldst_op) | op3(ldfsr_op3) | rs1(s1) | rs2(s2) ); } 126 inline void Assembler::ldxfsr( Register s1, Register s2) { v9_only(); emit_long( op(ldst_op) | rd(G1) | op3(ldfsr_op3) | rs1(s1) | rs2(s2) ); } 129 inline void Assembler::ldc( Register s1, Register s2, int crd) { v8_only(); emit_long( op(ldst_op) | fcn(crd) | op3(ldc_op3 ) | rs1(s1) | rs2(s2) ); } 131 inline void Assembler::lddc( Register s1, Register s2, int crd) { v8_only(); emit_long( op(ldst_op) | fcn(crd) | op3(lddc_op3 ) | rs1(s1) | rs2(s2) ); } 133 inline void Assembler::ldcsr( Register s1, Register s2, int crd) { v8_only(); emit_long( op(ldst_op) | fcn(crd) | op3(ldcsr_op3) | rs1(s1) | rs2(s [all...] |
/openjdk7/jdk/src/share/classes/com/sun/rowset/internal/ |
H A D | CachedRowSetWriter.java | 837 ResultSet rs, rs2 = null; 841 rs2 = dbmd.getPrimaryKeys(null, null, table); 844 while(rs2.next()) { 845 String pkcolname = rs2.getString("COLUMN_NAME");
|