Searched refs:tsbmiss (Results 1 - 6 of 6) sorted by relevance

/illumos-gate/usr/src/uts/sun4v/vm/
H A Dmach_sfmmu_asm.s102 ! } else if (current CPU tsbmiss->usfmmup != victim sfmmup) {
171 CPU_TSBMISS_AREA(%g5, %g6) /* load cpu tsbmiss area */
269 * Called to load MMU registers and tsbmiss area
294 CPU_TSBMISS_AREA(%o2, %o3) ! %o2 = tsbmiss area
315 * We need to set up the TSB base register, tsbmiss
334 CPU_TSBMISS_AREA(%o4, %o3) ! %o4 = tsbmiss area
389 CPU_TSBMISS_AREA(%o2, %o3) ! %o2 = tsbmiss area
391 ldub [%o0 + SFMMU_TTEFLAGS], %o3 ! per-CPU tsbmiss area.
402 ! set tsbmiss shmermap
406 CPU_TSBMISS_AREA(%o2, %o3) ! %o2 = tsbmiss are
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H A Dmach_sfmmu.h382 * tsbmiss = pointer to tsbmiss area
388 #define GET_UTSBREG_SHCTX(tsbmiss, tsbmissoffset, tsbreg) \
389 ldx [tsbmiss + tsbmissoffset], tsbreg
/illumos-gate/usr/src/uts/sfmmu/vm/
H A Dhat_sfmmu.h937 * Copy the sfmmu_region_map or scd_region_map to the tsbmiss
952 * If there is no scd, then zero the tsbmiss scd_shmermap,
967 * tsbarea = tsbmiss area (not clobbered)
1041 * tsbmiss = pointer to tsbmiss area
1045 * Specified tsbmiss area updated
1048 #define SET_UTSBREG_SHCTX(tsbmiss, tsbmissoffset, tsbreg) \
1049 stx tsbreg, [tsbmiss + tsbmissoffset] /* save tsbreg */
1056 * tsbmiss = pointer to tsbmiss are
1765 struct tsbmiss { struct
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H A Dhat_sfmmu.c536 * Enable trap level tsbmiss handling
3264 * Update the current CPU tsbmiss area, so the current thread
3265 * won't need to take the tsbmiss for the new pagesize.
3271 struct tsbmiss *tsbmp;
8649 * sure all CPUs running this process reload their tsbmiss area.
8650 * Otherwise they will fail to load the mappings in the tsbmiss
10694 * tsbmiss could only modify ref/mod bits of hments in old/new.
11701 struct tsbmiss *tsbmp;
11721 * flags are updated lazily in tsbmiss area on other cpus.
11722 * If we detect here that tsbmiss are
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/illumos-gate/usr/src/uts/sun4u/vm/
H A Dmach_sfmmu_asm.s111 ! current CPU tsbmiss->usfmmup == victim sfmmup) {
134 CPU_TSBMISS_AREA(%g5, %g6) /* load cpu tsbmiss area */
445 * Called to load MMU registers and tsbmiss area
464 * We need to set up the TSB base register, tsbmiss
489 CPU_TSBMISS_AREA(%o4, %o3) ! %o4 = tsbmiss area
519 mov %o4, %o2 ! %o2 = tsbmiss area
579 ldub [%o0 + SFMMU_TTEFLAGS], %o3 ! per-CPU tsbmiss area.
591 ! set tsbmiss shmermap
595 CPU_TSBMISS_AREA(%o2, %o3) ! %o2 = tsbmiss area
598 add %o2, TSBMISS_SCDSHMERMAP, %o2 ! zero tsbmiss scd_shmerma
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/illumos-gate/usr/src/uts/sfmmu/ml/
H A Dsfmmu_asm.s2006 * tsbmiss = address of tsb miss area (in)
2016 #define ISM_CHECK(tagacc, tsbmiss, ismseg, ismhat, tmp1, tmp2, tmp3 \
2018 ldx [tsbmiss + TSBMISS_ISMBLKPA], tmp1 /* tmp1 = &ismblk */ ;\
2208 * tsbarea = pointer to the tsbmiss area for this cpu. (in)
2365 * tsbarea = tsbmiss area ;\
2377 * tsbarea = tsbmiss area ;\
3178 * g6 = tsbmiss area
3193 * g6 = tsbmiss area
3274 * g6 = tsbmiss area
3291 * g6 = tsbmiss are
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