Lines Matching refs:tsbmiss
937 * Copy the sfmmu_region_map or scd_region_map to the tsbmiss
952 * If there is no scd, then zero the tsbmiss scd_shmermap,
967 * tsbarea = tsbmiss area (not clobbered)
1041 * tsbmiss = pointer to tsbmiss area
1045 * Specified tsbmiss area updated
1048 #define SET_UTSBREG_SHCTX(tsbmiss, tsbmissoffset, tsbreg) \
1049 stx tsbreg, [tsbmiss + tsbmissoffset] /* save tsbreg */
1056 * tsbmiss = pointer to tsbmiss area
1062 #define GET_UTSBREG_SHCTX(tsbmiss, tsbmissoffset, tsbreg) \
1063 ldx [tsbmiss + tsbmissoffset], tsbreg
1332 * tsbmiss uhashsz and khashsz data areas. The number below corresponds to
1765 struct tsbmiss {
1804 * boundary. It is not merged w/ struct tsbmiss since there is
1805 * not much to share and the tsbmiss pathes are different, so
1806 * a kpm tlbmiss/tsbmiss only touches one cacheline, except for
1808 * of struct tsbmiss is used on every dtlb miss.
1813 uchar_t flags; /* flags needed in TL tsbmiss handler */
1822 uint_t kpm_tsb_misses; /* kpm tsbmiss counter */
1833 * Flags for TL kpm tsbmiss handler
1836 #define KPMTSBM_TLTSBM_FLAG 0x02 /* use TL tsbmiss handler */
2046 * Macro to get this CPU's tsbmiss area.
2048 #define CPU_TSBMISS_AREA(tsbmiss, tmp1) \
2049 CPU_INDEX(tmp1, tsbmiss); /* tmp1 = cpu idx */ \
2050 sethi %hi(tsbmiss_area), tsbmiss; /* tsbmiss base ptr */ \
2052 or tsbmiss, %lo(tsbmiss_area), tsbmiss; \
2053 add tsbmiss, tmp1, tsbmiss /* tsbmiss area of CPU */
2349 extern struct tsbmiss tsbmiss_area[NCPU];
2415 * Memseg hash defines for kpm trap level tsbmiss handler.