Searched refs:rng_p (Results 1 - 10 of 10) sorted by relevance

/illumos-gate/usr/src/uts/i86pc/io/
H A Disa.c324 #define SET_RNGS(rng_p, used_p, ctyp, ptyp) do { \
325 (rng_p)->child_high = (ctyp); \
326 (rng_p)->child_low = (rng_p)->parent_low = (used_p)->base; \
327 (rng_p)->parent_high = (ptyp); \
328 (rng_p)->parent_mid = 0; \
329 (rng_p)->size = (used_p)->len; \
335 pib_ranges_t *rng_p = ranges; local
342 SET_RNGS(rng_p, used_p, ctype, ptype);
345 if (rng_p
422 pib_ranges_t *ranges, *rng_p; local
[all...]
/illumos-gate/usr/src/uts/sun4/io/px/
H A Dpx_util.c214 pci_ranges_t *rng_p = px_p->px_ranges_p; local
232 for (n = 0; n < rng_n; n++, rng_p++) {
233 if (space_type != PCI_REG_ADDR_G(rng_p->child_high))
236 rng_begin = (uint64_t)rng_p->child_mid << 32 | rng_p->child_low;
237 rng_sz = (uint64_t)rng_p->size_high << 32 | rng_p->size_low;
239 rng_begin += rng_p->child_high;
248 addr = reg_begin - rng_begin + ((uint64_t)rng_p->parent_high << 32 |
249 rng_p
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/illumos-gate/usr/src/uts/sun4u/opl/io/pcicmu/
H A Dpcmu_util.c191 pcmu_ranges_t *rng_p = pcmu_p->pcmu_ranges; local
209 for (n = 0; n < rng_n; n++, rng_p++) {
210 if (space_type != PCI_REG_ADDR_G(rng_p->child_high)) {
214 rng_begin = rng_p->child_low;
216 rng_begin += rng_p->child_high;
218 rng_end = rng_begin + rng_p->size_low - 1;
227 new_rp->regspec_addr = reg_begin - rng_begin + rng_p->parent_low;
228 new_rp->regspec_bustype = rng_p->parent_high;
H A Dpcicmu.c1151 pcmu_fix_ranges(pcmu_ranges_t *rng_p, int rng_entries) argument
1154 for (i = 0; i < rng_entries; i++, rng_p++) {
1155 if ((rng_p->child_high & PCI_REG_ADDR_M) == PCI_ADDR_CONFIG)
1156 rng_p->parent_low |= rng_p->child_high;
/illumos-gate/usr/src/uts/sun4u/io/pci/
H A Dpci_util.c214 pci_ranges_t *rng_p = pci_p->pci_ranges; local
231 for (n = 0; n < rng_n; n++, rng_p++) {
232 if (space_type != PCI_REG_ADDR_G(rng_p->child_high))
235 rng_begin = rng_p->child_low;
237 rng_begin += rng_p->child_high;
239 rng_end = rng_begin + rng_p->size_low - 1;
246 new_rp->regspec_addr = reg_begin - rng_begin + rng_p->parent_low;
247 new_rp->regspec_bustype = rng_p->parent_high;
H A Dpcipsy.c298 pci_fix_ranges(pci_ranges_t *rng_p, int rng_entries) argument
301 for (i = 0; i < rng_entries; i++, rng_p++)
302 if ((rng_p->child_high & PCI_REG_ADDR_M) == PCI_ADDR_CONFIG)
303 rng_p->parent_low |= rng_p->child_high;
H A Dpcisch.c446 pci_fix_ranges(pci_ranges_t *rng_p, int rng_entries) argument
/illumos-gate/usr/src/uts/sun4v/io/niumx/
H A Dniumx.c376 niumx_ranges_t *rng_p; local
399 (caddr_t)&rng_p, &rnglen) != DDI_SUCCESS) {
408 for (i = 0, reg_p += rn; i < rngnum; rng_p++, i++) {
409 if (reg_p->addr_high == rng_p->child_hi)
427 rng_begin = rng_p->child_lo;
431 (rng_begin + (rng_p->size_lo - 1))) {
437 p_regspec.regspec_bustype = rng_p->parent_hi;
438 p_regspec.regspec_addr = reg_begin - rng_begin + rng_p->parent_lo;
446 kmem_free(rng_p - i, rnglen);
/illumos-gate/usr/src/uts/sun4u/sys/pci/
H A Dpci_chip.h51 extern void pci_fix_ranges(pci_ranges_t *rng_p, int rng_entries);
/illumos-gate/usr/src/uts/sun4u/io/
H A Dupa64s.c973 upa64s_ranges_t *range_p, *rng_p; local
1015 for (i = 0, rng_p = range_p; i < n_ranges; i++, rng_p++) {
1016 uint64_t rng_beg = rng_p->upa64s_child;
1017 uint64_t rng_end = rng_beg + rng_p->upa64s_size;
1020 addr += rng_p->upa64s_parent;

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