Searched refs:msi_num (Results 1 - 11 of 11) sorted by relevance

/illumos-gate/usr/src/uts/sun4v/io/px/
H A Dpx_lib4v.h167 extern uint64_t hvio_msi_getmsiq(devhandle_t dev_hdl, msinum_t msi_num,
169 extern uint64_t hvio_msi_setmsiq(devhandle_t dev_hdl, msinum_t msi_num,
171 extern uint64_t hvio_msi_getvalid(devhandle_t dev_hdl, msinum_t msi_num,
173 extern uint64_t hvio_msi_setvalid(devhandle_t dev_hdl, msinum_t msi_num,
175 extern uint64_t hvio_msi_getstate(devhandle_t dev_hdl, msinum_t msi_num,
177 extern uint64_t hvio_msi_setstate(devhandle_t dev_hdl, msinum_t msi_num,
H A Dpx_hcall.s138 hvio_msi_getmsiq(devhandle_t dev_hdl, msinum_t msi_num,
144 hvio_msi_setmsiq(devhandle_t dev_hdl, msinum_t msi_num,
150 hvio_msi_getvalid(devhandle_t dev_hdl, msinum_t msi_num,
156 hvio_msi_setvalid(devhandle_t dev_hdl, msinum_t msi_num,
162 hvio_msi_getstate(devhandle_t dev_hdl, msinum_t msi_num,
168 hvio_msi_setstate(devhandle_t dev_hdl, msinum_t msi_num,
506 * arg1 - msi_num
522 * arg1 - msi_num
537 * arg1 - msi_num
553 * arg1 - msi_num
[all...]
H A Dpx_lib4v.c1003 px_lib_msi_getmsiq(dev_info_t *dip, msinum_t msi_num, argument
1008 DBG(DBG_LIB_MSI, dip, "px_lib_msi_getmsiq: dip 0x%p msi_num 0x%x\n",
1009 dip, msi_num);
1012 msi_num, msiq_id)) != H_EOK) {
1026 px_lib_msi_setmsiq(dev_info_t *dip, msinum_t msi_num, argument
1031 DBG(DBG_LIB_MSI, dip, "px_lib_msi_setmsiq: dip 0x%p msi_num 0x%x "
1032 "msq_id 0x%x\n", dip, msi_num, msiq_id);
1035 msi_num, msiq_id, msitype)) != H_EOK) {
1046 px_lib_msi_getvalid(dev_info_t *dip, msinum_t msi_num, argument
1051 DBG(DBG_LIB_MSI, dip, "px_lib_msi_getvalid: dip 0x%p msi_num
1069 px_lib_msi_setvalid(dev_info_t *dip, msinum_t msi_num, pci_msi_valid_state_t msi_valid_state) argument
1089 px_lib_msi_getstate(dev_info_t *dip, msinum_t msi_num, pci_msi_state_t *msi_state) argument
1112 px_lib_msi_setstate(dev_info_t *dip, msinum_t msi_num, pci_msi_state_t msi_state) argument
[all...]
/illumos-gate/usr/src/uts/sun4/io/px/
H A Dpx_lib.h128 extern int px_lib_msi_getmsiq(dev_info_t *dip, msinum_t msi_num,
130 extern int px_lib_msi_setmsiq(dev_info_t *dip, msinum_t msi_num,
132 extern int px_lib_msi_getvalid(dev_info_t *dip, msinum_t msi_num,
134 extern int px_lib_msi_setvalid(dev_info_t *dip, msinum_t msi_num,
136 extern int px_lib_msi_getstate(dev_info_t *dip, msinum_t msi_num,
138 extern int px_lib_msi_setstate(dev_info_t *dip, msinum_t msi_num,
H A Dpx_ib.c922 msinum_t msi_num, cpuid_t cpu_id)
940 DBG(DBG_IB, dip, "px_ib_set_msix_target: msi_num %x new cpu_id %x\n",
941 msi_num, cpu_id);
954 if ((ret = px_lib_msi_getmsiq(dip, msi_num,
997 msiq_rec_type, msi_num, cpu_id, &msiq_id)) != DDI_SUCCESS) {
999 "failed, rdip 0x%p msi 0x%x\n", rdip, msi_num);
1005 if ((ret = px_lib_msi_setmsiq(dip, msi_num,
1010 hdlp, msiq_rec_type, msi_num, msiq_id);
1017 PX_INTR_STATE_ENABLE, msiq_rec_type, msi_num)) != DDI_SUCCESS) {
1021 hdlp, msiq_rec_type, msi_num, msiq_i
921 px_ib_set_msix_target(px_t *px_p, ddi_intr_handle_impl_t *hdlp, msinum_t msi_num, cpuid_t cpu_id) argument
1112 pxtool_ib_get_ino_devs(px_t *px_p, uint32_t ino, uint32_t msi_num, uint8_t *devs_ret, pcitool_intr_dev_t *devs) argument
1168 pxtool_ib_get_msi_info(px_t *px_p, devino_t ino, msinum_t msi_num, ddi_intr_handle_impl_t *hdlp) argument
[all...]
H A Dpx_ib.h163 msinum_t msi_num, cpuid_t cpuid);
165 uint32_t msi_num, uint8_t *devs_ret, pcitool_intr_dev_t *devs);
166 extern int pxtool_ib_get_msi_info(px_t *px_p, devino_t ino, msinum_t msi_num,
H A Dpx_intr.c557 msinum_t msi_num; local
578 hdlp->ih_inum, &msi_num);
651 msiq_rec_type, msi_num, -1, &msiq_id)) != DDI_SUCCESS) {
653 "failed, rdip 0x%p msi 0x%x\n", rdip, msi_num);
659 if ((ret = px_lib_msi_setmsiq(dip, msi_num,
662 hdlp, msiq_rec_type, msi_num, msiq_id);
666 if ((ret = px_lib_msi_setstate(dip, msi_num,
669 hdlp, msiq_rec_type, msi_num, msiq_id);
673 if ((ret = px_lib_msi_setvalid(dip, msi_num,
679 PX_INTR_STATE_ENABLE, msiq_rec_type, msi_num);
[all...]
H A Dpx_msi.c55 msinum_t msi_num; local
76 for (i = 0, msi_num = msi_state_p->msi_1st_msinum;
77 i < msi_state_p->msi_cnt; i++, msi_num++) {
78 msi_state_p->msi_p[i].msi_msinum = msi_num;
232 "msi_num 0x%x count 0x%x\n", ddi_driver_name(rdip),
/illumos-gate/usr/src/uts/sun4u/io/px/
H A Dpx_lib4u.h360 extern uint64_t hvio_msi_getmsiq(devhandle_t dev_hdl, msinum_t msi_num,
362 extern uint64_t hvio_msi_setmsiq(devhandle_t dev_hdl, msinum_t msi_num,
364 extern uint64_t hvio_msi_getvalid(devhandle_t dev_hdl, msinum_t msi_num,
366 extern uint64_t hvio_msi_setvalid(devhandle_t dev_hdl, msinum_t msi_num,
368 extern uint64_t hvio_msi_getstate(devhandle_t dev_hdl, msinum_t msi_num,
370 extern uint64_t hvio_msi_setstate(devhandle_t dev_hdl, msinum_t msi_num,
H A Dpx_lib4u.c1095 px_lib_msi_getmsiq(dev_info_t *dip, msinum_t msi_num, argument
1100 DBG(DBG_LIB_MSI, dip, "px_lib_msi_getmsiq: dip 0x%p msi_num 0x%x\n",
1101 dip, msi_num);
1104 msi_num, msiq_id)) != H_EOK) {
1118 px_lib_msi_setmsiq(dev_info_t *dip, msinum_t msi_num, argument
1123 DBG(DBG_LIB_MSI, dip, "px_lib_msi_setmsiq: dip 0x%p msi_num 0x%x "
1124 "msq_id 0x%x\n", dip, msi_num, msiq_id);
1127 msi_num, msiq_id)) != H_EOK) {
1138 px_lib_msi_getvalid(dev_info_t *dip, msinum_t msi_num, argument
1143 DBG(DBG_LIB_MSI, dip, "px_lib_msi_getvalid: dip 0x%p msi_num
1161 px_lib_msi_setvalid(dev_info_t *dip, msinum_t msi_num, pci_msi_valid_state_t msi_valid_state) argument
1181 px_lib_msi_getstate(dev_info_t *dip, msinum_t msi_num, pci_msi_state_t *msi_state) argument
1204 px_lib_msi_setstate(dev_info_t *dip, msinum_t msi_num, pci_msi_state_t msi_state) argument
[all...]
H A Dpx_hlib.c2426 hvio_msi_getmsiq(devhandle_t dev_hdl, msinum_t msi_num, argument
2430 msi_num, ENTRIES_EQNUM);
2436 hvio_msi_setmsiq(devhandle_t dev_hdl, msinum_t msi_num, argument
2439 CSRA_FS((caddr_t)dev_hdl, MSI_MAPPING, msi_num,
2446 hvio_msi_getvalid(devhandle_t dev_hdl, msinum_t msi_num, argument
2450 msi_num, ENTRIES_V);
2456 hvio_msi_setvalid(devhandle_t dev_hdl, msinum_t msi_num, argument
2463 CSRA_BS((caddr_t)dev_hdl, MSI_MAPPING, msi_num,
2467 CSRA_BC((caddr_t)dev_hdl, MSI_MAPPING, msi_num,
2478 hvio_msi_getstate(devhandle_t dev_hdl, msinum_t msi_num, argument
2488 hvio_msi_setstate(devhandle_t dev_hdl, msinum_t msi_num, pci_msi_state_t msi_state) argument
[all...]

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