Searched refs:efx_qword_t (Results 1 - 21 of 21) sorted by relevance

/illumos-gate/usr/src/uts/common/io/sfxge/common/
H A Defx_sram.c41 efx_qword_t qword;
207 __out efx_qword_t *eqp)
214 for (index = 0; index < sizeof (efx_qword_t); index++)
222 __out efx_qword_t *eqp)
236 __out efx_qword_t *eqp)
249 __out efx_qword_t *eqp)
262 __out efx_qword_t *eqp)
267 for (index = 0; index < sizeof (efx_qword_t); index++) {
283 __out efx_qword_t *eqp)
289 EFX_CLEAR_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t))
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H A Dmcdi_mon.h56 __in efx_qword_t *eqp,
H A Def10_tx.c60 efx_qword_t *dma_addr;
101 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_TXQ_IN_DMA_ADDR);
192 efx_qword_t desc;
323 efx_qword_t *eqp;
326 EFSYS_ASSERT(length % sizeof (efx_qword_t) == 0);
343 eqp = (efx_qword_t *)buffer;
347 write_offset += sizeof (efx_qword_t);
367 efx_qword_t pio_desc;
385 offset = id * sizeof (efx_qword_t);
437 efx_qword_t qwor
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H A Dsiena_sram.c82 efx_qword_t qword;
83 efx_qword_t verify;
H A Defx_ev.c319 efx_qword_t qword;
323 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
341 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
453 __in efx_qword_t *eqp,
543 __in efx_qword_t *eqp,
697 __in efx_qword_t *eqp,
744 __in efx_qword_t *eqp,
758 __in efx_qword_t *eqp,
887 __in efx_qword_t *eqp,
915 __in efx_qword_t *eq
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H A Def10_ev.c53 __in efx_qword_t *eqp,
60 __in efx_qword_t *eqp,
67 __in efx_qword_t *eqp,
74 __in efx_qword_t *eqp,
81 __in efx_qword_t *eqp,
99 efx_qword_t *dma_addr;
151 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_EVQ_IN_DMA_ADDR);
352 __in efx_qword_t data)
393 efx_qword_t event;
480 __in efx_qword_t *eq
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H A Defx_nic.c782 __out efx_qword_t *maskp)
784 efx_qword_t mask;
889 efx_qword_t mask;
890 efx_qword_t modes;
921 *MCDI_OUT2(req, efx_qword_t, GET_LOOPBACK_MODES_OUT_SUGGESTED));
923 modes = *MCDI_OUT2(req, efx_qword_t, GET_LOOPBACK_MODES_OUT_100M);
927 modes = *MCDI_OUT2(req, efx_qword_t, GET_LOOPBACK_MODES_OUT_1G);
931 modes = *MCDI_OUT2(req, efx_qword_t, GET_LOOPBACK_MODES_OUT_10G);
940 *MCDI_OUT2(req, efx_qword_t, GET_LOOPBACK_MODES_OUT_40G);
H A Dsiena_mac.c236 EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp)
245 efx_qword_t value;
246 efx_qword_t generation_start;
247 efx_qword_t generation_end;
H A Def10_mac.c420 EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp)
430 efx_qword_t value;
431 efx_qword_t generation_start;
432 efx_qword_t generation_end;
H A Def10_rx.c54 efx_qword_t *dma_addr;
83 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR);
646 efx_qword_t qword;
668 offset = id * sizeof (efx_qword_t);
H A Defx.h761 __out efx_qword_t *maskp);
1060 efx_qword_t enc_loopback_types[EFX_LINK_NMODES];
1465 __out efx_qword_t *eqp);
1554 #define EFX_EVQ_SIZE(_nevs) ((_nevs) * sizeof (efx_qword_t))
1857 #define EFX_RXQ_SIZE(_ndescs) ((_ndescs) * sizeof (efx_qword_t))
1887 efx_qword_t ed_eq;
1950 #define EFX_TXQ_SIZE(_ndescs) ((_ndescs) * sizeof (efx_qword_t))
H A Dsiena_impl.h306 __in efx_qword_t *eqp,
H A Def10_phy.c119 __in efx_qword_t *eqp,
H A Dmcdi_mon.c256 __in efx_qword_t *eqp,
H A Defx_rx.c1008 efx_qword_t qword;
1030 offset = id * sizeof (efx_qword_t);
H A Defx_tx.c706 efx_qword_t qword; \
709 offset = id * sizeof (efx_qword_t); \
H A Dsiena_phy.c112 __in efx_qword_t *eqp,
H A Def10_impl.h560 __in efx_qword_t *eqp,
H A Defx_impl.h688 typedef boolean_t (*efx_ev_handler_t)(efx_evq_t *, efx_qword_t *,
H A Defx_types.h53 * we define our datatypes (efx_oword_t, efx_qword_t and efx_dword_t)
222 } efx_qword_t; typedef in typeref:union:efx_qword_u
233 efx_qword_t eo_qword[2];
314 /* Format string for printing an efx_qword_t */
332 /* Parameters for printing an efx_qword_t */
/illumos-gate/usr/src/uts/common/io/sfxge/
H A Defsys.h185 ASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t))); \
251 ASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t))); \
338 ASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t))); \
421 ASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t))); \
447 ASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t))); \

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