Searched refs:IIR (Results 1 - 3 of 3) sorted by relevance

/illumos-gate/usr/src/uts/intel/io/drm/
H A Di915_irq.c48 * Since pipe events are edge-triggered from the PIPESTAT register to IIR,
411 I915_WRITE(IIR, I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT);
496 iir = I915_READ(IIR);
508 I915_WRITE(IIR, iir);
510 (void) I915_READ(IIR); /* Flush posted writes */
1015 I915_WRITE(IIR, I915_READ(IIR));
1017 (void) I915_READ(IIR);
1049 I915_WRITE(IIR, I915_READ(IIR));
[all...]
H A Di915_drv.c756 s3_priv->saveIIR = S3_READ(IIR);
H A Di915_drv.h740 #define IIR 0x020a4 macro

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