| /vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/ |
| H A D | prism2_plx.c | 50 uint32_t iobase = 0; /* Prism2 I/O Base */ local
58 pci_read_config_dword( p, PRISM2_PLX_IO_BASE, &iobase);
59 iobase &= PCI_BASE_ADDRESS_IO_MASK;
62 hw->iobase = iobase;
64 printf ( "Prism2 has attribute memory at %#x and I/O base at %#x\n", attr_mem, iobase );
96 nic->ioaddr = hw->iobase;
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| H A D | etherfabric_nic.h | 183 unsigned int iobase; member in struct:efab_nic
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| H A D | 3c509.c | 343 unsigned int iobase; local
368 iobase = t509_id_read_eeprom ( EEPROM_ADDR_CFG );
369 t509->ioaddr = 0x200 + ( ( iobase & 0x1f ) << 4 );
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| H A D | dmfe.c | 889 static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset, argument
896 ioaddr = iobase + 0x80 + offset * 4;
900 ioaddr = iobase + DCR9;
943 static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset, argument
952 ioaddr = iobase + 0x80 + offset * 4;
956 ioaddr = iobase + DCR9;
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| H A D | prism2.c | 131 UINT32 iobase; member in struct:hfa384x
141 /* The global instance of the hardware (i.e. where we store iobase and membase, in the absence of anywhere better to put them */
187 return inw ( hw->iobase + reg );
197 outw ( val, hw->iobase + reg );
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| H A D | hfa384x.h | 2530 UINT32 iobase; member in struct:hfa384x
2702 UINT32 iobase,
2957 return wlan_inw_le16_to_cpu(hw->iobase+reg);
2982 wlan_outw_cpu_to_le16( val, hw->iobase + reg);
3008 return wlan_inw(hw->iobase+reg);
3033 wlan_outw( val, hw->iobase + reg);
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| H A D | etherfabric.c | 1176 outl ( reg, efab->iobase + FCN_IOM_IND_ADR_REG );
1177 outl ( value, efab->iobase + FCN_IOM_IND_DAT_REG );
1183 outl ( reg, efab->iobase + FCN_IOM_IND_ADR_REG );
1184 return inl ( efab->iobase + FCN_IOM_IND_DAT_REG );
4149 /* Get iobase/membase */
4158 efab->iobase = pci->ioaddr & ~3;
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| /vbox/src/VBox/Devices/PC/BIOS/ |
| H A D | ahci.c | 104 uint16_t iobase; member in struct:__anon14958
173 #define AHCI_WRITE_REG(iobase, reg, val) \
174 outpd((iobase) + AHCI_REG_IDX, reg); \
175 outpd((iobase) + AHCI_REG_DATA, val)
178 #define AHCI_READ_REG(iobase, reg, val) \
179 outpd((iobase) + AHCI_REG_IDX, reg); \
180 (val) = inpd((iobase) + AHCI_REG_DATA)
183 #define VBOXAHCI_PORT_WRITE_REG(iobase, port, reg, val) \
184 AHCI_WRITE_REG((iobase), AHCI_PORT_REG((port), (reg)), val)
187 #define VBOXAHCI_PORT_READ_REG(iobase, por
250 ahci_ctrl_set_bits(uint16_t iobase, uint16_t reg, uint32_t mask) argument
259 ahci_ctrl_clear_bits(uint16_t iobase, uint16_t reg, uint32_t mask) argument
269 ahci_ctrl_is_bit_set(uint16_t iobase, uint16_t reg, uint32_t mask) argument
[all...] |
| /vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/ath/ath5k/ |
| H A D | base.h | 90 void *iobase; /* address of the device */ member in struct:ath5k_softc
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| H A D | ath5k_attach.c | 128 ah->ah_iobase = sc->iobase;
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| H A D | ath5k.c | 361 sc->iobase = mem;
364 DBG("ath5k: register base at %p (%08lx)\n", sc->iobase, pdev->membase);
450 iounmap(sc->iobase);
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